SPRSP45C March 2020 – April 2024 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1
PRODUCTION DATA
Connecting all 3.3-V rails together and supplying from a single source are strongly recommended. This list includes:
In addition, connect all power pins to avoid leaving any unconnected.
In internal VREG mode, tying the VDD pins together is optional as long as each VDD pin has a capacitor connected to pin. See the VDD Decoupling section for VDD decoupling configurations.
The analog modules on the device have fairly high PSRR; therefore, in most cases, noise on VDDA will have to exceed the recommended operating conditions of the supply rails before the analog modules see performance degradation. Therefore, supplying VDDA separately typically offers minimal benefits. Nevertheless, for the purposes of noise improvement, placing a pi filter between VDDIO and VDDA is acceptable.