SPRSP45C March 2020 – April 2024 TMS320F280021 , TMS320F280021-Q1 , TMS320F280023 , TMS320F280023-Q1 , TMS320F280023C , TMS320F280025 , TMS320F280025-Q1 , TMS320F280025C , TMS320F280025C-Q1
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
fmod(1) | PMBus module frequency | SYSCLK / 32 | 10 | MHz | ||
fSCL | SCL clock frequency | 10 | 400 | kHz | ||
tBUF | Bus free time between STOP and START conditions | 1.3 | µs | |||
tHD;STA | START condition hold time -- SDA fall to SCL fall delay | 0.6 | µs | |||
tSU;STA | Repeated START setup time -- SCL rise to SDA fall delay | 0.6 | µs | |||
tSU;STO | STOP condition setup time -- SCL rise to SDA rise delay | 0.6 | µs | |||
tHD;DAT | Data hold time after SCL fall | 300 | ns | |||
tSU;DAT | Data setup time before SCL rise | 100 | ns | |||
tTimeout | Clock low time-out | 25 | 35 | ms | ||
tLOW | Low period of the SCL clock | 1.3 | µs | |||
tHIGH | High period of the SCL clock | 0.6 | 50 | µs | ||
tLOW;SEXT | Cumulative clock low extend time (slave device) | From START to STOP | 25 | ms | ||
tLOW;MEXT | Cumulative clock low extend time (master device) | Within each byte | 10 | ms | ||
tr | Rise time of SDA and SCL | 5% to 95% | 20 | 300 | ns | |
tf | Fall time of SDA and SCL | 95% to 5% | 20 | 300 | ns |