SPRSP61C October 2021 – December 2023 TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038C-Q1 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1
PRODMIX
The trigonometric math unit (TMU) extends the capabilities of a C28x+FPU by adding instructions and leveraging existing FPU instructions to speed up the execution of common trigonometric and arithmetic operations listed in Table 7-7.
Instructions | C Equivalent Operation | Pipeline Cycles |
---|---|---|
MPY2PIF32 RaH,RbH | a = b * 2pi | 2/3 |
DIV2PIF32 RaH,RbH | a = b / 2pi | 2/3 |
DIVF32 RaH,RbH,RcH | a = b/c | 5 |
SQRTF32 RaH,RbH | a = sqrt(b) | 5 |
SINPUF32 RaH,RbH | a = sin(b*2pi) | 4 |
COSPUF32 RaH,RbH | a = cos(b*2pi) | 4 |
ATANPUF32 RaH,RbH | a = atan(b)/2pi | 4 |
QUADF32 RaH,RbH,RcH,RdH | Operation to assist in calculating ATANPU2 | 5 |
Exponent instruction IEXP2F32 and logarithmic instruction LOG2F32 have been added to support computation of floating-point power function for the nonlinear proportional integral derivative control (NLPID) component of the C2000 Digital Control Library. These two added instructions reduce the power function calculations from a typical of 300 cycles using library emulation to less than 10 cycles.
No changes have been made to existing instructions, pipeline or memory bus architecture. All TMU instructions use the existing FPU register set (R0H to R7H) to carry out their operations.
For more information, see the TMS320C28x Extended Instruction Sets Technical Reference Manual.