SPRSP25A June 2018 – July 2018 TMS320F28035-EP
PRODUCTION DATA.
The device segregates peripherals into four sections. The mapping of peripherals is as follows:
PF0: | PIE: | PIE Interrupt Enable and Control Registers Plus PIE Vector Table | |
Flash: | Flash Waitstate Registers | ||
Timers: | CPU-Timers 0, 1, 2 Registers | ||
CSM: | Code Security Module KEY Registers | ||
ADC: | ADC Result Registers | ||
CLA | Control Law Accelrator Registers and Message RAMs | ||
PF1: | GPIO: | GPIO MUX Configuration and Control Registers | |
eCAN: | Enhanced Control Area Network Configuration and Control Registers | ||
LIN: | Local Interconnect Network Configuration and Control Registers | ||
eCAP: | Enhanced Capture Module and Registers | ||
eQEP: | Enhanced Quadrature Encoder Pulse Module and Registers | ||
HRCAP: | High-Resolution Capture Module and Registers | ||
PF2: | SYS: | System Control Registers | |
SCI: | Serial Communications Interface (SCI) Control and RX/TX Registers | ||
SPI: | Serial Port Interface (SPI) Control and RX/TX Registers | ||
ADC: | ADC Status, Control, and Configuration Registers | ||
I2C: | Inter-Integrated Circuit Module and Registers | ||
XINT: | External Interrupt Registers | ||
PF3: | ePWM: | Enhanced Pulse Width Modulator Module and Registers | |
HRPWM: | High-Resolution Pulse-Width Modulator Registers | ||
Comparators: | Comparator Modules |