SPRS902K October 2014 – February 2024 TMS320F28075 , TMS320F28075-Q1 , TMS320F28076
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
NO.(1)(2)(3) | PARAMETER | MIN | MAX | UNIT | |
---|---|---|---|---|---|
Reads and Writes | |||||
1 | td(TURNAROUND) | Turn around time | (TA)*E–3 | (TA)*E+2 | ns |
Reads | |||||
3 | tc(EMRCYCLE) | EMIF read cycle time (EW = 0) | (RS+RST+RH)*E–3 | (RS+RST+RH)*E+2 | ns |
EMIF read cycle time (EW = 1)(4) | (RS+RST+RH+ (MEWC*16))*E–3 | (RS+RST+RH+ (MEWC*16))*E+2 | ns | ||
4 | tsu(EMCEL-EMOEL) | Output setup time, EMxCS[y:2] low to EMxOE low (SS = 0) | (RS)*E–3 | (RS)*E+2 | ns |
Output setup time, EMxCS[y:2] low to EMxOE low (SS = 1) | –3 | 2 | ns | ||
5 | th(EMOEH-EMCEH) | Output hold time, EMxOE high to EMxCS[y:2] high (SS = 0) | (RH)*E–3 | (RH)*E | ns |
Output hold time, EMxOE high to EMxCS[y:2] high (SS = 1) | –3 | 0 | ns | ||
6 | tsu(EMBAV-EMOEL) | Output setup time, EMxBA[y:0] valid to EMxOE low | (RS)*E–3 | (RS)*E+2 | ns |
7 | th(EMOEH-EMBAIV) | Output hold time, EMxOE high to EMxBA[y:0] invalid | (RH)*E–3 | (RH)*E | ns |
8 | tsu(EMAV-EMOEL) | Output setup time, EMxA[y:0] valid to EMxOE low | (RS)*E–3 | (RS)*E+2 | ns |
9 | th(EMOEH-EMAIV) | Output hold time, EMxOE high to EMxA[y:0] invalid | (RH)*E–3 | (RH)*E | ns |
10 | tw(EMOEL) | EMxOE active low width (EW = 0) | (RST)*E–1 | (RST)*E+1 | ns |
EMxOE active low width (EW = 1)(4) | (RST+(MEWC*16))*E–1 | (RST+(MEWC*16))*E+1 | ns | ||
11 | td(EMWAITH-EMOEH) | Delay time from EMxWAIT deasserted to EMxOE high | 4E+10 | 5E+15 | ns |
29 | tsu(EMDQMV-EMOEL) | Output setup time, EMxDQM[y:0] valid to EMxOE low | (RS)*E–3 | (RS)*E+2 | ns |
30 | th(EMOEH-EMDQMIV) | Output hold time, EMxOE high to EMxDQM[y:0] invalid | (RH)*E–3 | (RH)*E | ns |
Writes | |||||
15 | tc(EMWCYCLE) | EMIF write cycle time (EW = 0) | (WS+WST+WH)*E–3 | (WS+WST+WH)*E+1 | ns |
EMIF write cycle time (EW = 1)(4) | (WS+WST+WH+ (MEWC*16))*E–3 | (WS+WST+WH+ (MEWC*16))*E+1 | ns | ||
16 | tsu(EMCEL-EMWEL) | Output setup time, EMxCS[y:2] low to EMxWE low (SS = 0) | (WS)*E–3 | (WS)*E+1 | ns |
Output setup time, EMxCS[y:2] low to EMxWE low (SS = 1) | –3 | 1 | ns | ||
17 | th(EMWEH-EMCEH) | Output hold time, EMxWE high to EMxCS[y:2] high (SS = 0) | (WH)*E–3 | (WH)*E | ns |
Output hold time, EMxWE high to EMxCS[y:2] high (SS = 1) | –3 | 0 | ns | ||
18 | tsu(EMDQMV-EMWEL) | Output setup time, EMxDQM[y:0] valid to EMxWE low | (WS)*E–3 | (WS)*E+1 | ns |
19 | th(EMWEH-EMDQMIV) | Output hold time, EMxWE high to EMxDQM[y:0] invalid | (WH)*E–3 | (WH)*E | ns |
20 | tsu(EMBAV-EMWEL) | Output setup time, EMxBA[y:0] valid to EMxWE low | (WS)*E–3 | (WS)*E+1 | ns |
21 | th(EMWEH-EMBAIV) | Output hold time, EMxWE high to EMxBA[y:0] invalid | (WH)*E–3 | (WH)*E | ns |
22 | tsu(EMAV-EMWEL) | Output setup time, EMxA[y:0] valid to EMxWE low | (WS)*E–3 | (WS)*E+1 | ns |
23 | th(EMWEH-EMAIV) | Output hold time, EMxWE high to EMxA[y:0] invalid | (WH)*E–3 | (WH)*E | ns |
24 | tw(EMWEL) | EMxWE active low width (EW = 0) | (WST)*E–1 | (WST)*E+1 | ns |
EMxWE active low width (EW = 1)(4) | (WST+(MEWC*16))*E–1 | (WST+(MEWC*16))*E+1 | ns | ||
25 | td(EMWAITH-EMWEH) | Delay time from EMxWAIT deasserted to EMxWE high | 4E+10 | 5E+15 | ns |
26 | tsu(EMDV-EMWEL) | Output setup time, EMxD[y:0] valid to EMxWE low | (WS)*E–3 | (WS)*E+1 | ns |
27 | th(EMWEH-EMDIV) | Output hold time, EMxWE high to EMxD[y:0] invalid | (WH)*E–3 | (WH)*E | ns |