SPRSP19 December   2017 TMS320F28377D-EP

PRODUCTION DATA.  

  1. 1Device Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagram
  2. 2Revision History
  3. 3Terminal Configuration and Functions
    1. 3.1 Pin Diagrams
    2. 3.2 Signal Descriptions
    3. 3.3 Pins With Internal Pullup and Pulldown
    4. 3.4 Pin Multiplexing
      1. 3.4.1 GPIO Muxed Pins
      2. 3.4.2 Input X-BAR
      3. 3.4.3 Output X-BAR and ePWM X-BAR
      4. 3.4.4 USB Pin Muxing
      5. 3.4.5 High-Speed SPI Pin Muxing
    5. 3.5 Connections for Unused Pins
  4. 4Specifications
    1. 4.1  Absolute Maximum Ratings
    2. 4.2  ESD Ratings
    3. 4.3  Recommended Operating Conditions
    4. 4.4  Power Consumption Summary
      1. 4.4.1 Current Consumption Graphs
      2. 4.4.2 Reducing Current Consumption
    5. 4.5  Electrical Characteristics
    6. 4.6  Thermal Resistance Characteristics
      1. 4.6.1 GWT Package
      2. 4.6.2 PTP Package
    7. 4.7  System
      1. 4.7.1 Power Sequencing
      2. 4.7.2 Reset Timing
        1. 4.7.2.1 Reset Sources
        2. 4.7.2.2 Reset Electrical Data and Timing
      3. 4.7.3 Clock Specifications
        1. 4.7.3.1 Clock Sources
        2. 4.7.3.2 Clock Frequencies, Requirements, and Characteristics
          1. 4.7.3.2.1 Input Clock Frequency and Timing Requirements, PLL Lock Times
          2. 4.7.3.2.2 Internal Clock Frequencies
          3. 4.7.3.2.3 Output Clock Frequency and Switching Characteristics
        3. 4.7.3.3 Input Clocks and PLLs
        4. 4.7.3.4 Crystal Oscillator
        5. 4.7.3.5 Internal Oscillators
      4. 4.7.4 Flash Parameters
      5. 4.7.5 Emulation/JTAG
        1. 4.7.5.1 JTAG Electrical Data and Timing
      6. 4.7.6 GPIO Electrical Data and Timing
        1. 4.7.6.1 GPIO - Output Timing
        2. 4.7.6.2 GPIO - Input Timing
        3. 4.7.6.3 Sampling Window Width for Input Signals
      7. 4.7.7 Interrupts
        1. 4.7.7.1 External Interrupt (XINT) Electrical Data and Timing
      8. 4.7.8 Low-Power Modes
        1. 4.7.8.1 Clock-Gating Low-Power Modes
        2. 4.7.8.2 Power-Gating Low-Power Modes
        3. 4.7.8.3 Low-Power Mode Wakeup Timing
      9. 4.7.9 External Memory Interface (EMIF)
        1. 4.7.9.1 Asynchronous Memory Support
        2. 4.7.9.2 Synchronous DRAM Support
        3. 4.7.9.3 EMIF Electrical Data and Timing
          1. 4.7.9.3.1 Asynchronous RAM
          2. 4.7.9.3.2 Synchronous RAM
    8. 4.8  Analog Peripherals
      1. 4.8.1 Analog-to-Digital Converter (ADC)
        1. 4.8.1.1 ADC Electrical Data and Timing
          1. 4.8.1.1.1 ADC Input Models
          2. 4.8.1.1.2 ADC Timing Diagrams
        2. 4.8.1.2 Temperature Sensor Electrical Data and Timing
      2. 4.8.2 Comparator Subsystem (CMPSS)
        1. 4.8.2.1 CMPSS Electrical Data and Timing
      3. 4.8.3 Buffered Digital-to-Analog Converter (DAC)
        1. 4.8.3.1 Buffered DAC Electrical Data and Timing
    9. 4.9  Control Peripherals
      1. 4.9.1 Enhanced Capture (eCAP)
        1. 4.9.1.1 eCAP Electrical Data and Timing
      2. 4.9.2 Enhanced Pulse Width Modulator (ePWM)
        1. 4.9.2.1 Control Peripherals Synchronization
        2. 4.9.2.2 ePWM Electrical Data and Timing
          1. 4.9.2.2.1 Trip-Zone Input Timing
        3. 4.9.2.3 External ADC Start-of-Conversion Electrical Data and Timing
      3. 4.9.3 Enhanced Quadrature Encoder Pulse (eQEP)
        1. 4.9.3.1 eQEP Electrical Data and Timing
      4. 4.9.4 High-Resolution Pulse Width Modulator (HRPWM)
        1. 4.9.4.1 HRPWM Electrical Data and Timing
      5. 4.9.5 Sigma-Delta Filter Module (SDFM)
        1. 4.9.5.1 SDFM Electrical Data and Timing
    10. 4.10 Communications Peripherals
      1. 4.10.1 Controller Area Network (CAN)
      2. 4.10.2 Inter-Integrated Circuit (I2C)
        1. 4.10.2.1 I2C Electrical Data and Timing
      3. 4.10.3 Multichannel Buffered Serial Port (McBSP)
        1. 4.10.3.1 McBSP Electrical Data and Timing
          1. 4.10.3.1.1 McBSP Transmit and Receive Timing
          2. 4.10.3.1.2 McBSP as SPI Master or Slave Timing
      4. 4.10.4 Serial Communications Interface (SCI)
      5. 4.10.5 Serial Peripheral Interface (SPI)
        1. 4.10.5.1 SPI Electrical Data and Timing
          1. 4.10.5.1.1 Non-High-Speed Master Mode Timings
          2. 4.10.5.1.2 Non-High-Speed Slave Mode Timings
          3. 4.10.5.1.3 High-Speed Master Mode Timings
          4. 4.10.5.1.4 High-Speed Slave Mode Timings
      6. 4.10.6 Universal Serial Bus (USB) Controller
        1. 4.10.6.1 USB Electrical Data and Timing
      7. 4.10.7 Universal Parallel Port (uPP) Interface
        1. 4.10.7.1 uPP Electrical Data and Timing
  5. 5Detailed Description
    1. 5.1  Overview
    2. 5.2  Functional Block Diagram
    3. 5.3  Memory
      1. 5.3.1 C28x Memory Map
      2. 5.3.2 Flash Memory Map
      3. 5.3.3 EMIF Chip Select Memory Map
      4. 5.3.4 Peripheral Registers Memory Map
      5. 5.3.5 Memory Types
        1. 5.3.5.1 Dedicated RAM (Mx and Dx RAM)
        2. 5.3.5.2 Local Shared RAM (LSx RAM)
        3. 5.3.5.3 Global Shared RAM (GSx RAM)
        4. 5.3.5.4 CPU Message RAM (CPU MSGRAM)
        5. 5.3.5.5 CLA Message RAM (CLA MSGRAM)
    4. 5.4  Identification
    5. 5.5  Bus Architecture - Peripheral Connectivity
    6. 5.6  C28x Processor
      1. 5.6.1 Floating-Point Unit
      2. 5.6.2 Trigonometric Math Unit
      3. 5.6.3 Viterbi, Complex Math, and CRC Unit II (VCU-II)
    7. 5.7  Control Law Accelerator
    8. 5.8  Direct Memory Access
    9. 5.9  Interprocessor Communication Module
    10. 5.10 Boot ROM and Peripheral Booting
      1. 5.10.1 EMU Boot or Emulation Boot
      2. 5.10.2 WAIT Boot Mode
      3. 5.10.3 Get Mode
      4. 5.10.4 Peripheral Pins Used by Bootloaders
    11. 5.11 Dual Code Security Module
    12. 5.12 Timers
    13. 5.13 Nonmaskable Interrupt With Watchdog Timer (NMIWD)
    14. 5.14 Watchdog
    15. 5.15 Configurable Logic Block (CLB)
  6. 6Applications, Implementation, and Layout
    1. 6.1 TI Design or Reference Design
  7. 7Device and Documentation Support
    1. 7.1 Device and Development Support Tool Nomenclature
    2. 7.2 Tools and Software
    3. 7.3 Device Nomenclature
    4. 7.4 Documentation Support
    5. 7.5 Community Resources
    6. 7.6 Trademarks
    7. 7.7 Electrostatic Discharge Caution
    8. 7.8 Export Control Notice
    9. 7.9 Glossary
  8. 8Mechanical, Packaging, and Orderable Information
    1. 8.1 Via Channel
    2. 8.2 Packaging Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Applications, Implementation, and Layout

NOTE

Information in the following sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

6.1 TI Design or Reference Design

TI Designs Reference Design Library is a robust reference design library spanning analog, embedded processor, and connectivity. Created by TI experts to help you jump start your system design, all TI Designs include schematic or block diagrams, BOMs, and design files to speed your time to market. Search and download designs at TIDesigns.

Industrial Servo Drive and AC Inverter Drive Reference Design
The DesignDRIVE Development Kit is a reference design for a complete industrial drive directly connecting to a three-phase ACI or PMSM motor. Many drive topologies can be created from the combined control, power, and communications technologies included on this single platform. This platform includes multiple position sensor interfaces, diverse current sensing techniques, hot-side partitioning options, and expansion for safety and industrial Ethernet.

Isolated Current Shunt and Voltage Measurement Reference Design for Motor Drives
This evaluation kit and reference design implement the AMC130x reinforced isolated delta-sigma modulators along with integrated Sinc filters in the C2000 TMS320F28377D Delfino microcontroller. The design provides an ability to evaluate the performance of these measurements: three motor currents, three inverter voltages, and the DC Link voltage. Provided in the kit is firmware to configure the Sinc filters, set the PLL frequency, and receive data from Sinc filters. A versatile run-time GUI is also provided to help the user validate the AMC130x performance and supports configuration changes to Sinc filter parameters in the Delfino controller.

Isolated, Shunt-Based Current Sensing Reference Design
This Verified TI Design implements an isolated current sensing data acqusition solution based on the AMC1304M25 isolated delta-sigma (ΔΣ) modulator and a TMS320F28377D microcontroller. This circuit was designed for shunt-based current measurement applications, which require excellent galvanic isolation and accuracy, such as industrial motor drives, photovoltaic inverters, and energy metering. It is capable of measuring load currents from –10 A to +10 A with better than 0.3% uncalibrated accuracy, and it also provides dual functionality of a high-resolution channel and an additional overcurrent or short-circuit detection channel. The design’s functionality and performance were verified against the circuit design goals by fabricating three PCBs and measuring results for dc and ac input signals.

Differential Signal Conditioning Circuit for Current and Voltage Measurement Using Fluxgate Sensors
This design provides a 4-channel signal conditioning solution for differential ADCs integrated into a microcontroller measuring motor current using fluxgate sensors. Also provided is an alternative measurement circuit with external differential SAR ADCs as well as circuits for high-speed overcurrent and earth fault detection. Proper differential signal conditioning improves noise immunity on critical current measurements in motor drives. This reference design can help increase the effective resolution of the analog-to-digital conversion, improving motor drive efficiency.