SPRS880P December 2013 – February 2024 TMS320F28374D , TMS320F28375D , TMS320F28376D , TMS320F28377D , TMS320F28377D-Q1 , TMS320F28378D , TMS320F28379D , TMS320F28379D-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
NO. | PARAMETER | MIN | MAX | UNIT | ||
---|---|---|---|---|---|---|
12 | tc(CLK) | Cycle time, CLK | SDR mode | 20 | ns | |
DDR mode | 40 | |||||
13 | tw(CLKH) | Pulse width, CLK high | SDR mode | 8 | ns | |
DDR mode | 18 | |||||
14 | tw(CLKL) | Pulse width, CLK low | SDR mode | 8 | ns | |
DDR mode | 18 | |||||
15 | td(CLKH-STV) | Delay time, START valid after CLK high | 3 | 12 | ns | |
16 | td(CLKH-ENV) | Delay time, ENABLE valid after CLK high | 3 | 12 | ns | |
17 | td(CLKH-DV) | Delay time, DATA valid after CLK high | 3 | 12 | ns | |
18 | td(CLKL-DV) | Delay time, DATA valid after CLK low | 3 | 12 | ns |