SPRS880P December 2013 – February 2024 TMS320F28374D , TMS320F28375D , TMS320F28376D , TMS320F28377D , TMS320F28377D-Q1 , TMS320F28378D , TMS320F28379D , TMS320F28379D-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
RAM blocks which are dedicated to each subsystem and are accessible to its CPU and CLA only, are called local shared RAMs (LSx RAMs).
All LSx RAM blocks have parity. These memories are secure and have the access protection (CPU write/CPU fetch) feature.
By default, these memories are dedicated to the CPU only, and the user could choose to share these memories with the CLA by configuring the MSEL_LSx bit field in the LSxMSEL registers appropriately.
Table 7-7 shows the master access for the LSx RAM.
MSEL_LSx | CLAPGM_LSx | CPU ALLOWED ACCESS | CLA ALLOWED ACCESS | COMMENT |
---|---|---|---|---|
00 | X | All | – | LSx memory is configured as CPU dedicated RAM. |
01 | 0 | All | Data Read Data Write | LSx memory is shared between CPU and CLA1. |
01 | 1 | Emulation Read Emulation Write | Fetch Only | LSx memory is CLA1 program memory. |