SPRS880P December 2013 – February 2024 TMS320F28374D , TMS320F28375D , TMS320F28376D , TMS320F28377D , TMS320F28377D-Q1 , TMS320F28378D , TMS320F28379D , TMS320F28379D-Q1
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
---|---|---|---|---|---|
ADC conversion cycles(1) | 10.1 | 11 | ADCCLKs | ||
Power-up time | 500 | µs | |||
Gain error | –5 | ±3 | 5 | LSBs | |
Offset error | –4 | ±2 | 4 | LSBs | |
Channel-to-channel gain error | ±4 | LSBs | |||
Channel-to-channel offset error | ±2 | LSBs | |||
ADC-to-ADC gain error | Identical VREFHI and VREFLO for all ADCs | ±4 | LSBs | ||
ADC-to-ADC offset error | Identical VREFHI and VREFLO for all ADCs | ±2 | LSBs | ||
DNL(2) | > –1 | ±0.5 | 1 | LSBs | |
INL | –2 | ±1.0 | 2 | LSBs | |
SNR(3)(10) | VREFHI = 2.5 V, fin = 100 kHz | 69.1 | dB | ||
THD(3)(10) | VREFHI = 2.5 V, fin = 100 kHz | –88 | dB | ||
SFDR(3)(10) | VREFHI = 2.5 V, fin = 100 kHz | 89 | dB | ||
SINAD(3)(10) | VREFHI = 2.5 V, fin = 100 kHz | 69.0 | dB | ||
ENOB(3)(10) | VREFHI = 2.5 V, fin = 100 kHz, single ADC(6), all packages |
11.2 | bits | ||
VREFHI = 2.5 V, fin = 100 kHz, synchronous ADCs(7), all packages | 11.2 | ||||
VREFHI = 2.5 V, fin = 100 kHz,
asynchronous ADCs(8), 100-pin PZP package |
Not supported | ||||
VREFHI = 2.5 V, fin = 100 kHz,
asynchronous ADCs(8), 176-pin PTP package |
9.7 | ||||
VREFHI = 2.5 V, fin = 100 kHz,
asynchronous ADCs(8), 337-ball ZWT package |
10.9 | ||||
PSRR | VDDA = 3.3-V DC + 200 mV DC up to Sine at 1 kHz |
60 | dB | ||
PSRR | VDDA = 3.3-V DC + 200 mV Sine at 800 kHz |
57 | dB | ||
ADC-to-ADC isolation(10)(4)(9) | VREFHI = 2.5 V, synchronous ADCs(7), all packages | –1 | 1 | LSBs | |
VREFHI = 2.5 V, asynchronous ADCs(8), 100-pin PZP package | Not supported | ||||
VREFHI = 2.5 V, asynchronous ADCs(8), 176-pin PTP package | –9 | 9 | |||
VREFHI = 2.5 V, asynchronous ADCs(8), 337-ball ZWT package | –2 | 2 | |||
VREFHI input current | 130 | µA |