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Data Sheet
TMS320F2838x
Real-Time Microcontrollers With Connectivity Manager
1 Features
- Dual-core C28x architecture
- Two TMS320C28x 32-bit CPUs
- 200 MHz
- IEEE 754 double-precision (64-bit) Floating-Point Unit (FPU)
- Trigonometric Math Unit (TMU)
- CRC engine and instructions (VCRC)
- Fast Integer Division (FINTDIV)
- 512KB (256KW) of flash on each CPU
(ECC-protected) - 44KB (22KW) of local RAM on each CPU
- 128KB (64KW) of global RAM shared between the two CPUs (parity-protected)
- Two Control Law Accelerators (CLAs)
- 200 MHz
- IEEE 754 single-precision floating-point
- Executes code independently of C28x CPU
- System peripherals
- Two External Memory Interfaces (EMIFs) with ASRAM and SDRAM support
- Two 6-channel Direct Memory Access (DMA) controllers
- Up to 169 General-Purpose Input/Output (GPIO) pins with input filtering
- Expanded Peripheral Interrupt controller (ePIE)
- Low-power mode (LPM) support
- Dual-zone security for third-party development
- Unique Identification (UID) number
- Embedded Real-time Analysis and Diagnostic (ERAD)
- Background CRC (BGCRC)
- Connectivity Manager (CM)
- Arm®Cortex®-M4 processor
- 125 MHz
- 512KB of flash (ECC-protected)
- 96KB of RAM (ECC-protected or parity-protected)
- Advanced Encryption Standard (AES) accelerator
- Generic CRC (GCRC)
- 32-channel Micro Direct Memory Access (µDMA) controller
- Universal Asynchronous Receiver/Transmitter (CM-UART)
- Inter-integrated Circuit (CM-I2C)
- Synchronous Serial Interface (SSI)
- 10/100 Ethernet 1588 MII/RMII
- C28x communications peripherals
- Fast Serial Interface (FSI) with two transmitters and eight receivers
- Four high-speed (up to 50-MHz) SPI ports (pin-bootable)
- Four Serial Communications Interfaces (SCI/UART) (pin-bootable)
- Two I2C interfaces (pin-bootable)
- Power-Management Bus (PMBus) interface
- Two Multichannel Buffered Serial Ports (McBSPs)
- CM-C28x shared communications peripherals
- EtherCAT® Slave Controller (ESC)
- USB 2.0 (MAC + PHY)
- Two Controller Area Network (CAN) modules (pin-bootable)
- MCAN (CAN FD)
- Analog subsystem
- Four Analog-to-Digital Converters (ADCs)
- 16-bit mode
- 1.1 MSPS each
- 12 differential or 24 single-ended inputs
- 12-bit mode
- 3.5 MSPS each
- 24 single-ended inputs
- Single sample-and-hold (S/H) on each ADC
- Hardware post-processing of conversions
- Eight windowed comparators with 12-bit Digital-to-Analog Converter (DAC) references
- Three 12-bit buffered DAC outputs
- Control peripherals
- 32 Pulse Width Modulator (PWM) channels
- High resolution on both A and B channels of 8 PWM modules (16 channels)
- Dead-band support (on both standard and high resolution)
- Seven Enhanced Capture (eCAP) modules
- High-resolution Capture (HRCAP) available on two of the seven eCAP modules
- Three Enhanced Quadrature Encoder Pulse (eQEP) modules
- Eight Sigma-Delta Filter Module (SDFM) input
channels, 2 independent filters per channel
- Configurable Logic
Block (CLB)
- Augments existing
peripheral capability
- Supports position manager
solutions
- Clock and system control
- Two internal zero-pin 10-MHz oscillators
- On-chip crystal oscillator
- Windowed watchdog timer module
- Missing clock detection circuitry
- Dual-clock Comparator (DCC)
- Hardware Built-in Self Test (HWBIST)
- 1.2-V core, 3.3-V I/O design
- Functional
Safety-Compliant
- Safety-related certification
- Package options:
- Lead-free, green packaging
- 337-ball New Fine Pitch Ball Grid Array (nFBGA) [ZWT suffix]
- 176-pin
PowerPAD™ Thermally Enhanced Low-profile Quad Flatpack (HLQFP) [PTP suffix]
- Temperature options:
- S: –40°C to 125°C
junction
- Q: –40°C to 125°C
ambient
(AEC Q100 qualification for
automotive applications)
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