SPRSP69 Data sheet

SPRSP69B July 2023 – November 2023 TMS320F28P650DK , TMS320F28P659DK-Q1

PRODMIX

Refer to the PDF data sheet for device specific package drawings

Table 6-4 Possible Reference Clock Sources

CLOCK SOURCE	MODULES CLOCKED	COMMENTS
INTOSC1	Can be used to provide clock for: Watchdog block Main PLL CPU-Timer 2	Internal oscillator 1. Zero-pin overhead 10-MHz internal oscillator.
INTOSC2⁽¹⁾	Can be used to provide clock for: Main PLL Auxiliary PLL CPU-Timer 2	Internal oscillator 2. Zero-pin overhead 10-MHz internal oscillator.
XTAL	Can be used to provide clock for: Main PLL Auxiliary PLL CPU-Timer 2	External crystal or resonator connected between the X1 and X2 pins or single-ended clock connected to the X1 pin.
AUXCLKIN	Can be used to provide clock for: Auxiliary PLL CPU-Timer 2	Single-ended 3.3-V level clock source. GPIO133/AUXCLKIN pin should be used to provide the input clock.

(1) On reset, internal oscillator 2 (INTOSC2) is the default clock source for both system PLL (OSCCLK) and auxiliary PLL (AUXOSCCLK).

Figure 6-22 Clocking System

Figure 6-23 SYSPLL/AUXPLL

Equation 1.

f_{P L L R A W C L K} = \frac{f_{O S C C L K}}{(R E F D I V + 1)} \times \frac{I M U L T}{(O D I V + 1)}

In the SYSPLL/AUXPLL figure,