SPNS254A June 2022 – March 2024 TMS570LC4357-SEP
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
The RTI module uses the RTI1CLK clock domain for generating the RTI time bases.
The application can select the clock source for the RTI1CLK by configuring the RCLKSRC register in the system module at address 0xFFFFFF50. The default source for RTI1CLK is VCLK.
For more information on clock sources, see Table 7-11 and Table 7-16.