SPNS141G August 2010 – October 2018 TMS570LS10106 , TMS570LS10116 , TMS570LS10206 , TMS570LS20206 , TMS570LS20216
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
This data sheet revision history highlights the technical changes made to the device or the datasheet.
Date | Additions, Deletions, And Modifications | Revision |
---|---|---|
March 2010 | Updated Memory Map section. | A |
June 2010 |
Updated the MibADC Input Equivalent Circuit illustration. Updated the ZWT Package Pinout illustration. |
B |
August 2010 October 2010 |
Updated the RTPDATA timing diagram. Added notes of speculative fetches on flash ECC and Ram ECC. Updated the current consumption with characterization data. Updated the timing requirement with characterization data. Added RCLK, test pin parameters, fixed the SPI timing fomulas. |
C |
January 2011 | Updated the datasheet with characterization data. TMS release. | D |
July 2011 |
Updated DMA Channel control packets numbers. Switched description of SPI1CS and SPI1CLK. Switched description of SPI3CS and SPI3CLK. Added table note to table 2-7 to specify the test clock for different RAMs. Modified the table note for table 7-6 to address Errata AnalogIP_F035.BTS_VMON _F035_33.2. |
F |
October 2018 | Removed all references to the SIL3 certification. Since this product is not recommended for new designs, Texas Instruments has chosen not to renew the SIL3 certification. No changes have been made to form, fit or function of this part. | G |