SCDS408C February   2019  – December 2023 TMUX1111 , TMUX1112 , TMUX1113

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics (VDD = 5V ±10 %)
    6. 6.6 Electrical Characteristics (VDD = 3.3V ±10 %)
    7. 6.7 Electrical Characteristics (VDD = 1.8V ±10 %)
    8. 6.8 Electrical Characteristics (VDD = 1.2V ±10 %)
    9. 6.9 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 On-resistance
    2. 7.2 Off-leakage current
    3. 7.3 On-leakage current
    4. 7.4 Transition time
    5. 7.5 Break-before-make
    6. 7.6 Charge injection
    7. 7.7 Off isolation
    8. 7.8 Channel-to-Channel Crosstalk
    9. 7.9 Bandwidth
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bidirectional operation
      2. 8.3.2 Rail to rail operation
      3. 8.3.3 1.8V Logic compatible inputs
      4. 8.3.4 Fail-safe logic
      5. 8.3.5 Ultra-Low Leakage Current
      6. 8.3.6 Ultra-Low Charge Injection
    4. 8.4 Device Functional Modes
    5. 8.5 Truth Tables
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application - Sample-and-Hold Circuit
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Typical Application - Switched Gain Amplifier
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
      3. 9.3.3 Application Curve
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|16
  • RSV|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

GUID-269D4F6A-63C2-499D-ADBA-D549EC920133-low.svgFigure 5-1 PW Package, 16-Pin TSSOP (Top View)
GUID-2B5D1018-9513-43DB-AE17-9F71CADAAEE4-low.svgFigure 5-2 RSV Package, 16-Pin UQFN (Top View)
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME TSSOP UQFN
SEL1 1 15 I Logic control input 1. Controls channel 1 state as shown in Section 8.5.
D1 2 16 I/O Drain pin 1. Can be an input or output.
S1 3 1 I/O Source pin 1. Can be an input or output.
N.C. 4 2 — No internal connection.
GND 5 3 P Ground (0 V) reference
S4 6 4 I/O Source pin 4. Can be an input or output.
D4 7 5 I/O Drain pin 4. Can be an input or output.
SEL4 8 6 I Logic control input 4. Controls channel 4 state as shown in Section 8.5.
SEL3 9 7 I Logic control input 3. Controls channel 3 state as shown in Section 8.5.
D3 10 8 I/O Drain pin 3. Can be an input or output.
S3 11 9 I/O Source pin 3. Can be an input or output.
N.C. 12 10 — No internal connection.
VDD 13 11 P Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND.
S2 14 12 I/O Source pin 2. Can be an input or output.
D2 15 13 I/O Drain pin 2. Can be an input or output.
SEL2 16 14 I Logic control input 2. Controls channel 2 state as shown in Section 8.5.
(1) I = input, O = output, I/O = input and output, P = power