The TMUX1574 is a complementary metal-oxide semiconductor (CMOS) switch. The TMUX1574 offers 2:1 SPDT switch configuration with 4-channels. Wide operating supply of 1.5 V to 5.5 V allows for use in a broad array of applications from servers and communication equipment to industrial applications. The device supports bidirectional analog and digital signals on the source (SxA, SxB) and drain (Dx) pins and can pass signals above supply up to VDD x 2, with a maximum input/output voltage of 5.5 V.
Powered-off Protection up to 3.6 V on the signal path of the TMUX1574 provides isolation when the supply voltage is removed (VDD = 0 V). Without this protection feature, switches can back-power the supply rail through an internal ESD diode and cause potential damage to the system.
Fail-Safe Logic circuitry allows voltages on the logic control pins to be applied before the supply pin, protecting the device from potential damage. All control inputs have 1.8 V logic compatible thresholds, ensuring both TTL and CMOS logic compatibility when operating in the valid supply voltage range. Integrated pull down resistor on the logic pins removes external components to reduce system size and cost.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TMUX1574 | TSSOP (16) | 5.00 mm × 4.40 mm |
UQFN (16) | 2.60 mm x 1.80 mm | |
SOT-23-THIN (16) | 4.20 mm x 2.00 mm |
Changes from B Revision (September 2019) to C Revision
Changes from A Revision (December 2018) to B Revision
Changes from * Revision (October 2018) to A Revision
PIN | TYPE(1) | DESCRIPTION(2) | ||
---|---|---|---|---|
NAME | TSSOP /
SOT-23-THIN |
UQFN | ||
SEL | 1 | 15 | I | Select pin: controls state of switches according to Table 1. Internal 6 MΩ pull-down to GND. |
S1A | 2 | 16 | I/O | Source pin 1A. Can be an input or output. |
S1B | 3 | 1 | I/O | Source pin 1B. Can be an input or output. |
D1 | 4 | 2 | I/O | Drain pin 1. Can be an input or output. |
S2A | 5 | 3 | I/O | Source pin 2A. Can be an input or output. |
S2B | 6 | 4 | I/O | Source pin 2B. Can be an input or output. |
D2 | 7 | 5 | I/O | Drain pin 2. Can be an input or output. |
GND | 8 | 6 | P | Ground (0 V) reference |
D3 | 9 | 7 | I/O | Drain pin 3. Can be an input or output. |
S3B | 10 | 8 | I/O | Source pin 3B. Can be an input or output. |
S3A | 11 | 9 | I/O | Source pin 3A. Can be an input or output. |
D4 | 12 | 10 | I/O | Drain pin 4. Can be an input or output. |
S4B | 13 | 11 | I/O | Source pin 4B. Can be an input or output. |
S4A | 14 | 12 | I/O | Source pin 4A. Can be an input or output. |
EN | 15 | 13 | I | Active low enable: When this pin is high, all switches are turned off. When this pin is low, SEL pin controls the signal path selection. Internal 6 MΩ pull-down to GND. |
VDD | 16 | 14 | P | Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND. |