SCDS452B March   2023  – May 2024 TMUX6221 , TMUX6222

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Thermal Information
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Source or Drain Continuous Current
    6. 5.6  ±15 V Dual Supply: Electrical Characteristics 
    7. 5.7  ±15 V Dual Supply: Switching Characteristics 
    8. 5.8  36 V Single Supply: Electrical Characteristics 
    9. 5.9  36 V Single Supply: Switching Characteristics 
    10. 5.10 12 V Single Supply: Electrical Characteristics 
    11. 5.11 12 V Single Supply: Switching Characteristics 
    12. 5.12 ±5 V Dual Supply: Electrical Characteristics 
    13. 5.13 ±5 V Dual Supply: Switching Characteristics 
    14. 5.14 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1  On-Resistance
    2. 6.2  Off-Leakage Current
    3. 6.3  On-Leakage Current
    4. 6.4  tON(EN) and tOFF(EN)
    5. 6.5  tON (VDD) Time
    6. 6.6  Propagation Delay
    7. 6.7  Charge Injection
    8. 6.8  Off Isolation
    9. 6.9  Crosstalk
    10. 6.10 Bandwidth
    11. 6.11 THD + Noise
    12. 6.12 Power Supply Rejection Ratio (PSRR)
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bidirectional Operation
      2. 7.3.2 Rail-to-Rail Operation
      3. 7.3.3 1.8 V Logic Compatible Inputs
      4. 7.3.4 Integrated Pull-Down Resistor on Logic Pins
      5. 7.3.5 Fail-Safe Logic
      6. 7.3.6 Latch-Up Immune
      7. 7.3.7 Ultra-Low Charge Injection
    4. 7.4 Device Functional Modes
    5. 7.5 Truth Tables
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Switched Gain Amplifier – Discrete PGA
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGS|10
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.12 ±5 V Dual Supply: Electrical Characteristics 

VDD = +5 V ± 10%, VSS = –5 V ±10%, GND = 0 V (unless otherwise noted) 
Typical at VDD = +5 V, VSS = –5 V, TA = 25℃  (unless otherwise noted)
PARAMETER TEST CONDITIONS TA MIN TYP MAX UNIT
ANALOG SWITCH
RON On-resistance VDD = +4.5 V, VSS = –4.5 V
VS = –4.5 V to +4.5 V
ID = –10 mA		 25°C 4 7.2 Ω
–40°C to +85°C 8.6 Ω
–40°C to +125°C 10 Ω
ΔRON On-resistance mismatch between channels VS = –4.5 V to +4.5 V
ID = –10 mA		 25°C 0.1 0.3 Ω
–40°C to +85°C 0.35 Ω
–40°C to +125°C 0.4 Ω
RON FLAT On-resistance flatness VS = –4.5 V to +4.5 V
ID = –10 mA		 25°C 1.3 2.2 Ω
–40°C to +85°C 2.5 Ω
–40°C to +125°C 2.8 Ω
RON DRIFT On-resistance drift VS = 0 V, IS = –10 mA –40°C to +125°C 0.019 Ω/°C
IS(OFF) Source off leakage current(1) VDD = +5.5 V, VSS = –5.5 V
Switch state is off
VS = +4.5 V / –4.5 V
VD = –4.5 V / + 4.5 V		 25°C –0.25 0.05 0.25 nA
–40°C to +85°C –1 1 nA
–40°C to +125°C –12 12 nA
ID(OFF) Drain off leakage current(1) VDD = +5.5 V, VSS = –5.5 V
Switch state is off
VS = +4.5 V / –4.5 V
VD = –4.5 V / + 4.5 V		 25°C –0.25 0.05 0.25 nA
–40°C to +85°C –1 1 nA
–40°C to +125°C –12 12 nA
IS(ON)
ID(ON)		 Channel on leakage current(2) VDD = +5.5 V, VSS = –5.5 V
Switch state is on
VS = VD = ±4.5 V		 25°C –0.25 0.05 0.25 nA
–40°C to +85°C –1 1 nA
–40°C to +125°C –12 12 nA
LOGIC INPUTS (SEL / EN pins)
VIH Logic voltage high –40°C to +125°C 1.3 36 V
VIL Logic voltage low –40°C to +125°C 0 0.8 V
IIH Input leakage current –40°C to +125°C 0.5 2 µA
IIL Input leakage current –40°C to +125°C –0.1 –0.005 µA
CIN Logic input capacitance –40°C to +125°C 3.5 pF
POWER SUPPLY
IDD VDD supply current VDD = +5.5 V, VSS = –5.5 V
Logic inputs = 0 V, 5 V, or VDD		 25°C 28 40 µA
–40°C to +85°C 50 µA
–40°C to +125°C 60 µA
ISS VSS supply current VDD = +5.5 V, VSS = –5.5 V
Logic inputs = 0 V, 5 V, or VDD		 25°C 5 10 µA
–40°C to +85°C 12 µA
–40°C to +125°C 21 µA
(1) When VS is positive, VD is negative, or when VS is negative, VD is positive.
(2) When VS is at a voltage potential, VD is floating, or when VD is at a voltage potential, VS is floating.