SCDS455 May   2022 TMUX7219M

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Thermal Information
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Source or Drain Continuous Current
    6. 6.6  ±15 V Dual Supply: Electrical Characteristics 
    7. 6.7  ±15 V Dual Supply: Switching Characteristics 
    8. 6.8  ±20 V Dual Supply: Electrical Characteristics
    9. 6.9  ±20 V Dual Supply: Switching Characteristics
    10. 6.10 44 V Single Supply: Electrical Characteristics 
    11. 6.11 44 V Single Supply: Switching Characteristics 
    12. 6.12 12 V Single Supply: Electrical Characteristics 
    13. 6.13 12 V Single Supply: Switching Characteristics 
    14. 6.14 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1  On-Resistance
    2. 7.2  Off-Leakage Current
    3. 7.3  On-Leakage Current
    4. 7.4  Transition Time
    5. 7.5  tON(EN) and tOFF(EN)
    6. 7.6  Break-Before-Make
    7. 7.7  tON (VDD) Time
    8. 7.8  Propagation Delay
    9. 7.9  Charge Injection
    10. 7.10 Off Isolation
    11. 7.11 Crosstalk
    12. 7.12 Bandwidth
    13. 7.13 THD + Noise
    14. 7.14 Power Supply Rejection Ratio (PSRR)
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bidirectional Operation
      2. 8.3.2 Rail-to-Rail Operation
      3. 8.3.3 1.8 V Logic Compatible Inputs
      4. 8.3.4 Integrated Pull-Up and Pull-Down Resistor on Logic Pins
      5. 8.3.5 Fail-Safe Logic
      6. 8.3.6 Latch-Up Immune
      7. 8.3.7 Ultra-Low Charge Injection
    4. 8.4 Device Functional Modes
    5. 8.5 Truth Tables
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Data Acquisition Calibration
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

Figure 5-1 DGK Package
8-Pin VSSOP
(Top View)
Table 5-1 Pin Functions
PIN TYPE(1) DESCRIPTION(2)
NAME NO.
D 1 I/O Drain pin. Can be an input or output.
S1 2 I/O Source pin 1. Can be an input or output.
GND 3 P Ground (0 V) reference
VDD 4 P Positive power supply. This pin is the most positive power-supply potential. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VDD and GND.
EN 5 I Active high logic enable, has internal pull-up resistor. When this pin is low, all switches are turned off. When this pin is high, the SEL logic input determine which switch is turned on.
SEL 6 I Logic control input, has internal pull-down resistor. Controls the switch connection as shown in Section 8.5.
VSS 7 P Negative power supply. This pin is the most negative power-supply potential. In single-supply applications, this pin can be connected to ground. For reliable operation, connect a decoupling capacitor ranging from 0.1 µF to 10 µF between VSS and GND.
S2 8 I/O Source pin 2. Can be an input or output.
(1) I = input, O = output, I/O = input and output, P = power.
(2) Refer to Section 8.4 for what to do with unused pins.