SCDS429G February   2021  – July 2024 TMUX7234

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Thermal Information
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Source or Drain Continuous Current
    6. 5.6  ±15 V Dual Supply: Electrical Characteristics 
    7. 5.7  ±15 V Dual Supply: Switching Characteristics 
    8. 5.8  ±20 V Dual Supply: Electrical Characteristics
    9. 5.9  ±20 V Dual Supply: Switching Characteristics
    10. 5.10 44 V Single Supply: Electrical Characteristics 
    11. 5.11 44 V Single Supply: Switching Characteristics 
    12. 5.12 12 V Single Supply: Electrical Characteristics 
    13. 5.13 12 V Single Supply: Switching Characteristics 
    14. 5.14 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1  On-Resistance
    2. 6.2  Off-Leakage Current
    3. 6.3  On-Leakage Current
    4. 6.4  Transition Time
    5. 6.5  tON(EN) and tOFF(EN)
    6. 6.6  Break-Before-Make
    7. 6.7  tON (VDD) Time
    8. 6.8  Propagation Delay
    9. 6.9  Charge Injection
    10. 6.10 Off Isolation
    11. 6.11 Crosstalk
    12. 6.12 Bandwidth
    13. 6.13 THD + Noise
    14. 6.14 Power Supply Rejection Ratio (PSRR)
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Bidirectional Operation
      2. 7.3.2 Rail-to-Rail Operation
      3. 7.3.3 1.8 V Logic Compatible Inputs
      4. 7.3.4 Fail-Safe Logic
      5. 7.3.5 Latch-Up Immune
      6. 7.3.6 Ultra-Low Charge Injection
    4. 7.4 Device Functional Modes
    5. 7.5 Truth Tables
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN MAX UNIT
VDD–VSS Supply voltage 48 V
VDD –0.5 48 V
VSS –48 0.5 V
VSEL or VEN Logic control input pin voltage (SELx, EN) –0.5 48 V
ISEL or IEN Logic control input pin current (SELx, EN) –30 30 mA
VS or VD Source or drain voltage (SxA, SxB, Dx) VSS–0.5 VDD+0.5 V
IIK  Diode clamp current(3) –30 30 mA
IS or ID (CONT) Source or drain continuous current (SxA, SxB, Dx) IDC ± 10 %(4) mA
TA Ambient temperature –55 150 °C
Tstg Storage temperature –65 150 °C
TJ Junction temperature 150 °C
Ptot Total power dissipation (QFN package)(5) 1680 mW
(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to ground, unless otherwise specified.
(3) Pins are diode-clamped to the power-supply rails. Over voltage signals must be voltage and current limited to maximum ratings.
(4) Refer to Source or Drain Continuous Current table for IDC specifications.
(5) For QFN package: Ptot derates linearily above TA = 70°C by 24.8mW/°C.