SCDS403C february   2021  – july 2023 TMUX7308F , TMUX7309F

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Thermal Information
    4. 7.4  Recommended Operating Conditions
    5. 7.5  Electrical Characteristics (Global)
    6. 7.6  ±15 V Dual Supply: Electrical Characteristics
    7. 7.7  ±20 V Dual Supply: Electrical Characteristics
    8. 7.8  12 V Single Supply: Electrical Characteristics
    9. 7.9  36 V Single Supply: Electrical Characteristics
    10. 7.10 Typical Characteristics
  9. 8 Parameter Measurement Information
    1. 8.1  On-Resistance
    2. 8.2  Off-Leakage Current
    3. 8.3  On-Leakage Current
    4. 8.4  Input and Output Leakage Current Under Overvoltage Fault
    5. 8.5  Break-Before-Make Delay
    6. 8.6  Enable Delay Time
    7. 8.7  Transition Time
    8. 8.8  Fault Response Time
    9. 8.9  Fault Recovery Time
    10. 8.10 Charge Injection
    11. 8.11 Off Isolation
    12. 8.12 Crosstalk
    13. 8.13 Bandwidth
    14. 8.14 THD + Noise
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Flat On – Resistance
      2. 9.3.2 Protection Features
        1. 9.3.2.1 Input Voltage Tolerance
        2. 9.3.2.2 Powered-Off Protection
        3. 9.3.2.3 Fail-Safe Logic
        4. 9.3.2.4 Overvoltage Protection and Detection
        5. 9.3.2.5 Adjacent Channel Operation During Fault
        6. 9.3.2.6 ESD Protection
        7. 9.3.2.7 Latch-Up Immunity
        8. 9.3.2.8 EMC Protection
      3. 9.3.3 Bidirectional Operation
      4. 9.3.4 1.8 V Logic Compatible Inputs
      5. 9.3.5 Integrated Pull-Down Resistor on Logic Pins
    4. 9.4 Device Functional Modes
      1. 9.4.1 Normal Mode
      2. 9.4.2 Fault Mode
      3. 9.4.3 Truth Tables
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.4.3 Truth Tables

Table 9-1 shows the truth tables for the TMUX7308F.

Table 9-1 TMUX7308F Truth Table
EN A2 A1 A0

Selected Source Connected to Drain Pin (D)
0 X(1) X(1) X(1)

All sources are off (HI-Z)
1 0 0 0 S1
1 0 0 1 S2
1 0 1 0 S3
1 0 1 1 S4
1 1 0 0 S5
1 1 0 1 S6
1 1 1 0 S7
1 1 1 1 S8
(1) "X" means "do not care."

Table 9-2 shows the truth tables for the TMUX7309F.

Table 9-2 TMUX7309F Truth Table
EN A1 A0 Selected Source Connected to Drain Pins (DA, DB)
0 X(1) X(1)

All sources are off (HI-Z)
1 0 0 S1A and S1B
1 0 1 S2A and S2B
1 1 0 S3A and S3B
1 1 1 S4A and S4B
(1) "X" means "do not care."

If unused, Ax pins must be tied to GND so that the device does not consume additional current as highlighted in Implications of Slow or Floating CMOS Inputs. Unused signal path inputs (Sx or Dx) should be connected to GND.