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TMUX730xF ±60-V Fault-Protected, 8:1 and Dual 4:1 Multiplexers with Latch-Up Immunity and 1.8-V Logic
SCDS403C
february 2021 – july 2023
TMUX7308F
,
TMUX7309F
PRODUCTION DATA
CONTENTS
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TMUX730xF ±60-V Fault-Protected, 8:1 and Dual 4:1 Multiplexers with Latch-Up Immunity and 1.8-V Logic
1
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Thermal Information
7.4
Recommended Operating Conditions
7.5
Electrical Characteristics (Global)
7.6
±15 V Dual Supply: Electrical Characteristics
7.7
±20 V Dual Supply: Electrical Characteristics
7.8
12 V Single Supply: Electrical Characteristics
7.9
36 V Single Supply: Electrical Characteristics
7.10
Typical Characteristics
8
Parameter Measurement Information
8.1
On-Resistance
8.2
Off-Leakage Current
8.3
On-Leakage Current
8.4
Input and Output Leakage Current Under Overvoltage Fault
8.5
Break-Before-Make Delay
8.6
Enable Delay Time
8.7
Transition Time
8.8
Fault Response Time
8.9
Fault Recovery Time
8.10
Charge Injection
8.11
Off Isolation
8.12
Crosstalk
8.13
Bandwidth
8.14
THD + Noise
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Flat On – Resistance
9.3.2
Protection Features
9.3.2.1
Input Voltage Tolerance
9.3.2.2
Powered-Off Protection
9.3.2.3
Fail-Safe Logic
9.3.2.4
Overvoltage Protection and Detection
9.3.2.5
Adjacent Channel Operation During Fault
9.3.2.6
ESD Protection
9.3.2.7
Latch-Up Immunity
9.3.2.8
EMC Protection
9.3.3
Bidirectional Operation
9.3.4
1.8 V Logic Compatible Inputs
9.3.5
Integrated Pull-Down Resistor on Logic Pins
9.4
Device Functional Modes
9.4.1
Normal Mode
9.4.2
Fault Mode
9.4.3
Truth Tables
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.3
Application Curves
10.3
Power Supply Recommendations
10.4
Layout
10.4.1
Layout Guidelines
10.4.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Support Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
RRP|16
MPQF545
PW|16
MPDS361A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
scds403c_oa
scds403c_pm
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Data Sheet
TMUX730xF ±60-V Fault-Protected, 8:1 and Dual 4:1 Multiplexers with Latch-Up Immunity and 1.8-V Logic
1
Features
Wide supply range:
Dual supply: ±5 V to ±22 V
Single supply: 8 V to 44 V
Integrated fault protection:
Overvoltage protection, source to supplies or source to drain: ±85 V
Overvoltage protection: ±60 V
Powered-off protection: ±60 V
Non-fault channels continue to operate
Known state without logic inputs present
Output clamped to the supply in overvoltage condition
Latch-up immune
1.8-V Logic capable
Fail-safe logic: up to 44 V independent of supply
Integrated pull-down resistor on logic pins
Break-before-make switching
Industry standard TSSOP and
smaller WQFN packages
2
Applications
Factory automation and control
Programmable logic controllers (PLC)
Analog input modules
Semiconductor test equipment
Battery test equipment
Servo drive control module
Data acquisition systems (DAQ)
Functional Block Diagram