SCDS400B march 2022 – july 2023 TMUX7348F , TMUX7349F
PRODMIX
Latch-up is a condition where a low impedance path is created between a supply pin and ground. This condition is caused by a trigger (current injection or overvoltage), but once activated, the low impedance path remains even after the trigger is no longer present. This low impedance path may cause system upset or catastrophic damage due to excessive current levels. The latch-up condition typically requires a power cycle to eliminate the low impedance path.
The TMUX7348F and TMUX7349F devices are constructed on silicon on insulator (SOI) based process where an oxide layer is added between the PMOS and NMOS transistor of each CMOS switch to prevent parasitic structures from forming. The oxide layer is also known as an insulating trench and prevents triggering of latch up events due to overvoltage or current injections. The latch-up immunity feature allows the TMUX7348F and TMUX7349F to be used in harsh environments. For more information on latch-up immunity refer to the Using Latch-Up Immune Multiplexers to Help Improve System Reliability application report.