SCDS394B march   2021  – june 2023 TMUX7462F

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Thermal Information
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Electrical Characteristics (Global)
    6. 6.6  ±15 V Dual Supply: Electrical Characteristics
    7. 6.7  ±20 V Dual Supply: Electrical Characteristics
    8. 6.8  12 V Single Supply: Electrical Characteristics
    9. 6.9  36 V Single Supply: Electrical Characteristics
    10. 6.10 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1  On-Resistance
    2. 7.2  On-Leakage Current
    3. 7.3  Input and Output Leakage Current under Overvoltage Fault
    4. 7.4  Fault Response Time
    5. 7.5  Fault Recovery Time
    6. 7.6  Fault Flag Response Time
    7. 7.7  Fault Flag Recovery Time
    8. 7.8  Fault Drain Enable Time
    9. 7.9  Inter-Channel Crosstalk
    10. 7.10 Bandwidth
    11. 7.11 THD + Noise
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Flat ON-Resistance
      2. 8.3.2 Protection Features
        1. 8.3.2.1 Input Voltage Tolerance
        2. 8.3.2.2 Powered-Off Protection
        3. 8.3.2.3 Fail-Safe Logic
        4. 8.3.2.4 Overvoltage Protection and Detection
        5. 8.3.2.5 Latch-Up Immunity
        6. 8.3.2.6 EMC Protection
      3. 8.3.3 Overvoltage Fault Flags
      4. 8.3.4 Bidirectional Operation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Mode
      2. 8.4.2 Fault Mode
      3. 8.4.3 Truth Table
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.2.4 Overvoltage Protection and Detection

The TMUX7462F detects overvoltage inputs by comparing the voltage on a source pin (Sx) with the fault supplies (VFP and VFN). A signal is considered overvoltage if it exceeds the fault supply voltages by the threshold voltage (VT).

The switch automatically turns OFF and the source pin becomes high impedance so that only small leakage currents flow through the switch when an overvoltage is detected. The drain pin (Dx) behavior can be adjusted by controlling the drain response (DR) pin in the following ways:

  1. DR pin floating or driven above VIH:

    If the DR pin is driven about VIH level of the pin, then the drain pin becomes high impedance (Hi-Z) upon overvoltage fault.

  2. DR driven below VIL:

    If the DR pin is driven below VIL level of the pin, then the drain pin (Dx) is pulled to the supply that was exceeded. For example, if the source voltage exceeds VFP, then the drain output is pulled to VFP. If the source voltage exceeds VFN, then the drain output is pulled to VFN. The pull-up impedance is approximately 40 kΩ, and as a result, the drain current is limited to roughly 1 mA during a shorted load (to GND) condition.

Figure 9-3 shows a detailed view of the how the DR pin controls the output state of the drain pin under a fault scenario.

GUID-20211018-SS0I-2XXJ-NDKX-2QHJPKPCM827-low.gif Figure 8-1 Detailed Functional Diagram

VFP and VFN are required fault supplies that set the level at which the overvoltage protection is engaged. VFP can be supplied from 3 V to VDD, while the VFN can be supplied from VSS to 0 V. If the fault supplies are not available in the system, then the VFP pin must be connected to VDD, while the VFN pin must be connected to VSS. In this case, the overvoltage protection then engages at the primary supply voltages VDD and VSS.