SLASEP7A
May 2020 – May 2022
TMUXHS4212
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
High-Speed Performance Parameters
6.7
Switching Characteristics
6.8
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Output Enable and Power Savings
8.3.2
Data Line Biasing
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
USB 3.2 Implementation for USB Type-C
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curves
9.2.2
PCIe Lane Muxing
9.2.2.1
Application Curves
9.3
Systems Examples
9.3.1
USB/eSATA
9.3.2
MIPI Camera Serial Interface
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
Support Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RKS|20
MPQF266C
Thermal pad, mechanical data (Package|Pins)
RKS|20
QFND312B
Orderable Information
slasep7a_oa
slasep7a_pm
6.8
Typical Characteristics
Figure 6-1
Jitter Decomposition of 10 Gbps PRBS-7 Signals Through Calibration Traces in TI Evaluation Board
Figure 6-3
Jitter Decomposition of 16 Gbps PRBS-7 Signals Through Calibration Traces in TI Evaluation Board
Figure 6-2
Jitter Decomposition of 10 Gbps PRBS-7 Signals Through a Typical
TMUXHS4212
Channel in TI Evaluation Board
Figure 6-4
Jitter Decomposition of 16 Gbps PRBS-7 Signals Through a Typical
TMUXHS4212
Channel in TI Evaluation Board