SLASEW5
December 2020
TMUXHS4412
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
High-Speed Performance Parameters
6.7
Switching Characteristics
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Output Enable and Power Savings
7.3.2
Data Line Biasing
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
PCIe Lane Muxing
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.3
Pin-to-pin Passive versus Redriver Option
8.2.1.4
Application Curves
8.3
Systems Examples
8.3.1
PCIe Muxing for Hybrid SSD
8.3.2
DisplayPort Main Link
8.3.3
USB 4.0 / TBT 3.0 Demuxing
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Receiving Notification of Documentation Updates
11.2
Support Resources
11.3
Trademarks
11.4
Electrostatic Discharge Caution
11.5
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RUA|42
MPQF210D
Thermal pad, mechanical data (Package|Pins)
RUA|42
QFND142D
Orderable Information
slasew5_oa
slasew5_pm
8.3.3
USB 4.0 / TBT 3.0 Demuxing
Figure 8-8
shows an application block diagram where TMUXHS4412 is used to demultiplex USB 4.0 / TBT 3.0 TX and TX signals. Note SBU signals within USB-C interface must be switched outside of this device.
Figure 8-8
USB 4.0 / TBT 3.0 Demuxing