SLASEW5A December   2020  – October 2024 TMUXHS4412

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 High-Speed Performance Parameters
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Output Enable and Power Savings
      2. 6.3.2 Data Line Biasing
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 PCIe Lane Muxing
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Pin-to-Pin Passive Versus Redriver Option
        4. 7.2.1.4 Application Curves
    3. 7.3 Systems Examples
      1. 7.3.1 PCIe Muxing for Hybrid SSD
      2. 7.3.2 DisplayPort Main Link
      3. 7.3.3 USB 4.0 / TBT 3.0 Demuxing
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Related Documentation
      1. 8.1.1 Documentation Support
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.2 Data Line Biasing

The TMUXHS4412 has a weak pulldown of 1MΩ from D[0/1/2/3][P/N] pins to GND. While these resistors biases the device data channels to common-mode voltage (CMV) of 0V with very weak strength, TI recommends that the device is biased by a stronger impedance from either side of the device to a valid value. To avoid double biasing, ensure appropriate AC coupling capacitors are on either side of the device.

In certain use cases where both sides of the TMUXHS4412 is AC-coupled, TI recommends to use appropriate CMV biasing for the device. 10kΩ to GND or any other bias voltage in the CMV range for each D[0/1/2/3][P/N] pin will suffice for most use cases.

The high-speed data ports incorporate 20kΩ pulldown resistors that are switched in when a port is not selected and switched out when the port is selected. For example: when SEL = L, the DB[0/1/2/3][P/N] pins have 20kΩ resistors to GND. The feature ensures that unselected port is always biased to a known voltage for long term reliability of the device and the electrical channel.

The positive and negative terminals of data pins D[0/1/2/3] have a weak (20kΩ) differential resistor in between the terminals for device switch regulation operation. This does not impact signal integrity or functionality of high-speed differential signaling that typically has much stronger differential impedance (such as 100Ω).