SCDS453B June 2024 – September 2024 TMUXS7614D
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
TMUXS7614D enters burst mode through a write to the burst mode enable bit in the BURST_EN register found in the Register Map. Burst mode grants the ability to send numerous SPI commands consecutively without deasserting the CS pin. While in burst mode the operation is in 16-bit frames by default or with CRC enabled 24-bit frames. The SDO pin aligns with the same response expected while in address mode- for reads SDO returns read-back values, and for writes SDO outputs 0x2500. The SCLK error behaves in a different manner to address mode. If the SCLK count is not a multiple of 16 or 24 then the SCLK error flag asserts. CRC and read/write invalid errors operate while in burst mode similarly to operation in address mode.