SLOS660C January   2010  – October 2015 TPA2028D1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Operating Characteristics
    7. 7.7 I2C Timing Requirements
    8. 7.8 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Automatic Gain Control
      2. 9.3.2 Operation With DACs and CODECs
      3. 9.3.3 Filter Free Operation and Ferrite Bead Filters
      4. 9.3.4 General I2C Operation
        1. 9.3.4.1 Single- and Multiple-Byte Transfers
        2. 9.3.4.2 Single-Byte Write
        3. 9.3.4.3 Multiple-Byte Write and Incremental Multiple-Byte Write
        4. 9.3.4.4 Single-Byte Read
        5. 9.3.4.5 Multiple-Byte Read
    4. 9.4 Device Functional Modes
      1. 9.4.1 Enable/Disable Amplifier
      2. 9.4.2 TPA2028D1 AGC and Start-Up Operation
        1. 9.4.2.1 AGC Startup Condition
      3. 9.4.3 Short Circuit Auto-Recovery
    5. 9.5 Programming
      1. 9.5.1 TPA2028D1 AGC Recommended Settings
    6. 9.6 Register Maps
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Decoupling Capacitor CS
        2. 10.2.2.2 Input Capacitors CI)
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
    1. 11.1 Power Supply Decoupling Capacitors
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Component Placement
      2. 12.1.2 Trace Width
      3. 12.1.3 Pad Size
    2. 12.2 Layout Example
    3. 12.3 Efficiency and Thermal Considerations
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Community Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Power Supply Recommendations

The TPA2028D1 is designed to operate from an input voltage supply range between 2.5-V and 5.5-V. Therefore the output voltage range of the power supply should be within this range and well regulated. The current capability of upper power should not exceed the maximum current limit of the power switch.

11.1 Power Supply Decoupling Capacitors

The TPA2028D1 requires adequate power supply decoupling to ensure a high efficiency operation with low total harmonic distortion (THD). Place a low equivalent-series-resistance (ESR) ceramic capacitor, typically 0.1 µF, within 2 mm of the PVDD pin. This choice of capacitor and placement helps with higher frequency transients, spikes, or digital hash on the line. In addition to the 0.1 μF ceramic capacitor, is recommended to place a 2.2 µF to 10 µF capacitor on the VDD supply trace. This larger capacitor acts as a charge reservoir, providing energy faster than the board supply, thus helping to prevent any droop in the supply voltage.