SLOS650F August   2009  â€“ June 2016 TPA3113D2

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Electrical Characteristics, VCC = 24 V
    6. 6.6 DC Electrical Characteristics, VCC = 12 V
    7. 6.7 AC Electrical Characteristics, VCC = 24 V
    8. 6.8 AC Electrical Characteristics, VCC = 12 V
    9. 6.9 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Gain Setting Through GAIN0 and GAIN1 Inputs
      2. 7.3.2 SD Operation
      3. 7.3.3 PLIMIT
      4. 7.3.4 GVDD Supply
      5. 7.3.5 DC Detect
      6. 7.3.6 PBTL Select
      7. 7.3.7 Short-Circuit Protection and Automatic Recovery Feature
      8. 7.3.8 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 TPA3113D2 Modulation Scheme
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Stereo Class-D Amplifier With BTL Output
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Ferrite Bead Filter Considerations
          2. 8.2.1.2.2 Efficiency: LC Filter Required With the Traditional Class-D Modulation Scheme
          3. 8.2.1.2.3 When to Use an Output Filter for EMI Suppression
          4. 8.2.1.2.4 Input Resistance
          5. 8.2.1.2.5 Input Capacitor, CI
          6. 8.2.1.2.6 BSN and BSP Capacitors
          7. 8.2.1.2.7 Differential Inputs
          8. 8.2.1.2.8 Using LOW-ESR Capacitors
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Stereo Class-D Amplifier With BTL Output
      3. 8.2.3 Stereo Class-D Amplifier With PBTL Output
  9. Power Supply Recommendations
    1. 9.1 Power Supply Decoupling, CS
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 PCB Material Recommendation
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Power Supply Recommendations

9.1 Power Supply Decoupling, CS

The TPA3113D2 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to ensure that the output total harmonic distortion (THD) is as low as possible. Power supply decoupling also prevents oscillations for long lead lengths between the amplifier and the speaker. Optimum decoupling is achieved by using a network of capacitors of different types that target specific types of noise on the power supply leads. For higher frequency transients due to parasitic circuit elements such as bond wire and copper trace inductances as well as lead frame capacitance, a good-quality low equivalent-series-resistance (ESR) ceramic capacitor of value between 220 pF and 1000 pF works well. This capacitor must be placed as close to the device PVCC pins and system ground (either PGND pins or PowerPAD) as possible. For mid-frequency noise due to filter resonances or PWM switching transients as well as digital hash on the line, another good-quality capacitor typically 0.1 μF to 1 μF placed as close as possible to the device PVCC leads works best. For filtering lower frequency noise signals, a larger aluminum electrolytic capacitor of 220 μF or greater placed near the audio power amplifier is recommended. The 220-μF capacitor also serves as a local storage capacitor for supplying current during large signal transients on the amplifier outputs. The PVCC terminals provide the power to the output transistors, so a 220-µF or larger capacitor should be placed on each PVCC terminal. A 10-μF capacitor on the AVCC terminal is adequate. Also, a small decoupling resistor between AVCC and PVCC can be used to keep high frequency class D noise from entering the linear input amplifiers.