SLASEF0
November 2022
TPA3223
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison
6
Pin Configuration and Functions
6.1
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Audio Characteristics (BTL)
7.7
Audio Characteristics (PBTL)
7.8
Typical Characteristics, BTL Configuration, AD-mode
7.9
Typical Characteristics, PBTL Configuration, AD-mode
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagrams
9.3
Feature Description
9.3.1
Input Configuration, Gain Setting And Primary / Peripheral Operation
9.3.2
Gain Setting And Clock Synchronization
9.3.3
PWM Modulation
9.3.4
Oscillator
9.3.5
Input Impedance
9.3.6
Error Reporting
9.4
Device Functional Modes
9.4.1
Powering Up
9.4.1.1
Startup Ramp Time
9.4.2
Powering Down
9.4.2.1
Power Down Ramp Time
9.4.3
Device Reset
9.4.4
Device Soft Mute
9.4.5
Device Protection System
9.4.5.1
Overload and Short Circuit Current Protection
9.4.5.2
Signal Clipping and Pulse Injector
9.4.5.3
DC Speaker Protection
9.4.5.4
Pin-to-Pin Short Circuit Protection (PPSC)
9.4.5.5
Overtemperature Protection OTW and OTE
9.4.5.6
Undervoltage Protection (UVP), Overvoltage Protection (OVP), and Power-on Reset (POR)
9.4.5.7
Fault Handling
10
Application and Implementation
10.1
Application Information
10.2
Typical Applications
10.2.1
Stereo BTL Application
10.2.1.1
Design Requirements
10.2.1.2
Detailed Design Procedures
10.2.1.2.1
Decoupling Capacitor Recommendations
10.2.1.2.2
PVDD Capacitor Recommendation
10.2.1.2.3
BST capacitors
10.2.1.2.4
PCB Material Recommendation
10.2.2
Application Curves
10.2.3
Typical Application, Differential (2N), AD-Mode PBTL (Outputs Paralleled after LC filter)
10.2.3.1
Design Requirements
10.3
Power Supply Recommendations
10.3.1
Power Supplies
10.3.1.1
VDD Supply
10.3.1.2
AVDD and GVDD Supplies
10.3.1.3
PVDD Supply
10.3.1.4
BST Supply
10.4
Layout
10.4.1
Layout Guidelines
10.4.2
Layout Examples
10.4.2.1
BTL Application Printed Circuit Board Layout Example
10.4.2.2
PBTL (Outputs Paralleled after LC filter) Application Printed Circuit Board Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.2
Receiving Notification of Documentation Updates
11.3
Support Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DDV|44
MPDS169G
Thermal pad, mechanical data (Package|Pins)
DDV|44
PPTD233A
Orderable Information
slasef0_oa
slasef0_pm
4
Revision History
DATE
REVISION
NOTES
November 2022
*
Initial release