SLASEC7A September   2016  – October 2016 TPA3245

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Audio Characteristics (BTL)
    7. 7.7  Audio Characteristics (SE)
    8. 7.8  Audio Characteristics (PBTL)
    9. 7.9  Typical Characteristics, BTL Configuration
    10. 7.10 Typical Characteristics, SE Configuration
    11. 7.11 Typical Characteristics, PBTL Configuration
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
      1. 9.3.1 Error Reporting
    4. 9.4 Device Protection System
      1. 9.4.1 Overload and Short Circuit Current Protection
      2. 9.4.2 Signal Clipping and Pulse Injector
      3. 9.4.3 DC Speaker Protection
      4. 9.4.4 Pin-to-Pin Short Circuit Protection (PPSC)
      5. 9.4.5 Overtemperature Protection OTW and OTE
      6. 9.4.6 Undervoltage Protection (UVP) and Power-on Reset (POR)
      7. 9.4.7 Fault Handling
      8. 9.4.8 Device Reset
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Stereo BTL Application
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedures
          1. 10.2.1.2.1 Decoupling Capacitor Recommendations
          2. 10.2.1.2.2 PVDD Capacitor Recommendation
          3. 10.2.1.2.3 PCB Material Recommendation
          4. 10.2.1.2.4 Oscillator
      2. 10.2.2 Application Curves
      3. 10.2.3 Typical Application, Single Ended (1N) SE
        1. 10.2.3.1 Design Requirements
        2. 10.2.3.2 Detailed Design Procedures
        3. 10.2.3.3 Application Curves
      4. 10.2.4 Typical Application, Differential (2N), PBTL (Outputs Paralleled before LC filter)
        1. 10.2.4.1 Design Requirements
        2. 10.2.4.2 Detailed Design Procedures
        3. 10.2.4.3 Application Curves
      5. 10.2.5 Typical Application, Differential (2N), PBTL (Outputs Paralleled after LC filter)
        1. 10.2.5.1 Design Requirements
        2. 10.2.5.2 Detailed Design Procedures
  11. 11Power Supply Recommendations
    1. 11.1 Power Supplies
      1. 11.1.1 VDD Supply
      2. 11.1.2 GVDD_X Supply
      3. 11.1.3 PVDD Supply
    2. 11.2 Powering Up
    3. 11.3 Powering Down
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Examples
      1. 12.2.1 BTL Application Printed Circuit Board Layout Example
      2. 12.2.2 SE Application Printed Circuit Board Layout Example
      3. 12.2.3 PBTL (Outputs Paralleled before LC filter) Application Printed Circuit Board Layout Example
      4. 12.2.4 PBTL (Outputs Paralleled after LC filter) Application Printed Circuit Board Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

14 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.