SLVS639F October 2007 – February 2016 TPD12S521
PRODUCTION DATA.
Refer to the PDF data sheet for device specific package drawings
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
V5V_SUPPLY | Supply voltage | –0.3 | 6 | V | |
VLV_SUPPLY | |||||
VI/O | DC voltage at any channel input | –0.5 | 6 | V | |
Tstg | Storage temperature range | –65 | 150 | °C |
VALUE | UNIT | ||||
---|---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per MIL-STD-883, Method 3015, CDISCHARGE = 100 pF, RDISCHARGE = 1.5 kΩ(1) | Pins 1, 2, 16–19, 37, 38 | ±2000 | V |
IEC 61000-4-2 Contact Discharge(2) | Pins 4, 7, 10, 13, 20–24, 27, 30, 33 | ±8000 |
MIN | TYP | MAX | UNIT | |||
---|---|---|---|---|---|---|
TA | Operating free-air temperature | –40 | 85 | °C | ||
5V_SUPPLY | Operating supply voltage | 5 | 5.5 | V | ||
LV_SUPPLY | Bias supply voltage | 1 | 3.3 | 5.5 | V |
THERMAL METRIC(1) | TPD12S521 | UNIT | |
---|---|---|---|
DBT | |||
38 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 83.6 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 29.8 | |
RθJB | Junction-to-board thermal resistance | 44.7 | |
ψJT | Junction-to-top characterization parameter | 2.9 | |
ψJB | Junction-to-board characterization parameter | 44.1 |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||||
---|---|---|---|---|---|---|---|---|---|
ICC5 | Operating supply current | 5V_SUPPLY = 5 V | 110 | 130 | µA | ||||
ICC3 | Bias supply current | LV_SUPPLY = 3.3 V | 1 | 5 | µA | ||||
VDROP | 5V_OUT overcurrent output drop | 5V_SUPPLY = 5 V, IOUT = 55 mA | 150 | 200 | mV | ||||
ISC | 5V_OUT short-circuit current limit | 5V_SUPPLY= 5 V, 5V_OUT = GND | 90 | 135 | 175 | mA | |||
IOFF | OFF-state leakage current, level-shifting NFET | LV_SUPPLY = 0 V | 0.1 | 5 | µA | ||||
IBACK DRIVE | Current conducted from output pins to V_SUPPLY rails when powered down | 5V_SUPPLY < VCH_OUT | TMDS_D[2:0]+/–, TMDS_CK+/–, CE_REMOTE_OUT, DDC_DAT_OUT, DDC_CLK_OUT, HOTPLUG_DET_OUT |
0.1 | 5 | µA | |||
VON | Voltage drop across level-shifting NFET when ON | LV_SUPPLY = 2.5 V, VS = GND, IDS = 3 mA | 75 | 95 | 140 | mV | |||
VF | Diode forward voltage | IF = 8 mA, | Top diode | 0.85 | V | ||||
TA = 25°C(1) | Bottom diode | 0.85 | |||||||
VCL | Channel clamp voltage at ±8 kV HBM ESD | TA = 25°C(1)(2) | Positive transients | 9 | V | ||||
Negative transients | -9 | ||||||||
RDYN | Dynamic resistance | I = 1 A, TA = 25°C(3) | Positive transients | 3 | Ω | ||||
Negative transients | 1.5 | ||||||||
ILEAK | TMDS channel leakage current | TA = 25°C(1) | 0.01 | 1 | µA | ||||
CIN, TMDS |
TMDS channel input capacitance | 5V_SUPPLY= 5 V, Measured at 1 MHz, VBIAS = 2.5 V(1) |
0.8 | 1.0 | pF | ||||
ΔCIN, TMDS |
TMDS channel input capacitance matching | 5V_SUPPLY= 5 V, Measured at 1 MHz, | 0.05 | pF | |||||
CMUTUAL | Mutual capacitance between signal pin and adjacent signal pin | 5V_SUPPLY= 0 V, Measured at 1 MHz, VBIAS = 2.5 V(1) |
0.07 | pF | |||||
CIN | Level-shifting input capacitance, capacitance to GND | 5V_SUPPLY= 0 V, Measured at 100 KHz, VBIAS = 2.5 V(1) |
DDC | 3.5 | 4 | pF | |||
CEC | 3.5 | 4 | |||||||
HP | 3.5 | 4 |