SLVSDL0A
May 2016 – July 2016
TPD1E1B04
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
ESD Ratings—IEC Specification
6.4
Recommended Operating Conditions
6.5
Thermal Information
6.6
Electrical Characteristics
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
IEC 61000-4-2 ESD Protection
7.3.2
IEC 61000-4-4 EFT Protection
7.3.3
IEC 61000-4-5 Surge Protection
7.3.4
IO Capacitance
7.3.5
DC Breakdown Voltage
7.3.6
Low Leakage Current
7.3.7
Extremely Low ESD Clamping Voltage
7.3.8
Industrial Temperature Range
7.3.9
Industry Standard Footprint
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Signal Range
8.2.2.2
Operating Frequency
8.2.3
Application Curve
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Community Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DPY|2
MPSS034D
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsdl0a_oa
slvsdl0a_pm
5 Pin Configuration and Functions
DPY Package
2-Pin X1SON
Top View
Pin Functions
PIN
I/O
DESCRIPTION
NO.
NAME
1
IO
I/O
ESD Protected Channel. If used as ESD IO, connect pin 2 to ground
2
IO
I/O
ESD Protected Channel. If used as ESD IO, connect pin 1 to ground