The TPD2E009 device provides two ESD protection diodes with flow-through pin mapping for ease of board layout. This device has been designed to protect sensitive components which are connected to ultra high-speed data and transmission lines. The TPD2E009 offers transient voltage suppression for Level 4 of IEC 61000-4-2 Contact ESD protection. TVS protection up to a 5-A (8/20 μs) peak pulse-current rating per the IEC 61000-4-5 (lightning) specification is also provided.
The monolithic silicon technology allows matching between the differential signal pairs. The less than 0.05-pF differential capacitance ensures that the differential signal distortion due to added ESD circuit protection remains minimal. The low capacitance
(0.7-pF) is suitable for high-speed data rates up to
6 Gbps.
The TPD2E009 TVS diode is offered in a DRT
(1 mm × 0.8 mm) package for space-saving portable applications. The industry standard DBZ (2.92 mm × 1.3 mm) package offers additional flexibility in the board layout for the system designer.
Typical applications for the TPD2E009 line of ESD protection products are: HDMI, USB, eSATA, and ethernet interfaces in notebooks, DVD and media players, set-top boxes, and portable computers.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPD2E009 | SOT (3) | 2.92 mm × 1.30 mm |
1.00 mm × 0.80 mm |
Changes from A Revision (June 2009) to B Revision
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
D+ | 1 | ESD port | High-speed ESD clamp provides ESD protection to the high-speed differential data lines |
D– | 2 | ||
GND | 3 | GND | Ground |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
Operating temperature | –40 | 85 | °C | ||
I/O voltage tolerance | D+, D– pins | 0 | 6 | V | |
Peak pulse current (tp = 8/20 μs) | 5 | A | |||
Peak pulse power (tp = 8/20 μs) | 45 | W | |||
Storage temperature, Tstg | –65 | 125 | °C |
VALUE | UNIT | ||||
---|---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±15000 | V | |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±1000 | ||||
IEC 61000-4-2 contact discharge | D+, D– pins | ±8000 | |||
IEC 61000-4-2 air-gap discharge | D+, D– pins | ±8000 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
Operating free-air temperature, TA | –40 | 85 | °C | ||
Operating voltage | Pin 1 or 2 to 3 or Pin 3 to 1 or 2 | 0 | 5.5 | V |
THERMAL METRIC(1) | TPD2E009 | UNIT | ||
---|---|---|---|---|
DBZ (SOT) | DRT (SOT) | |||
3 PINS | 3 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 461.8 | 610 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 216.2 | 288 | °C/W |
RθJB | Junction-to-board thermal resistance | 195.6 | 118.4 | °C/W |
ψJT | Junction-to-top characterization parameter | 70.1 | 20.2 | °C/W |
ψJB | Junction-to-board characterization parameter | 193.7 | 116.4 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
VRWM | Reverse stand-off voltage | D+, D– pins to ground | 5.5 | V | |||
VCLAMP | Clamp voltage | D+, D– pins to ground, | IIO = 1 A | 8 | V | ||
IIO | Current from I/O port to supply pins | VIO = 2.5 V | 0.01 | 0.1 | μA | ||
VD | Diode forward voltage | D+, D– pins, lower clamp diode, |
VIO = 2.5 V, ID = 8 mA | 0.6 | 0.8 | 0.95 | V |
D+, D– pins, upper clamp diode, DRY package |
VCC = 0 V, ID = –8 mA | 0.6 | 0.8 | 0.95 | |||
RDYN | Dynamic resistance | D+, D– pins, | I = 1 A | 1 | Ω | ||
CIO | I/O capacitance | D+, D– pins, DBZ Package | VIO = 2.5 V, f = 10 MHz | 0.9 | pF | ||
D+, D– pins, DRT Package | VIO = 2.5 V, f = 10 MHz | 0.7 | pF | ||||
VBR | Break-down voltage | IIO = 1 mA | 7 | V |