SLVS953B June   2009  – August 2015 TPD2E009

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The TPD2E009 device is a diode-array type TVS typically used to provide a path to ground for dissipating ESD events on high-speed signal lines between a human-interface connector and a system. As the current from ESD passes through the TVS, only a small voltage drop is present across the diode. This is the voltage presented to the protected IC. The low RDYN of the triggered TVS holds this voltage, VCLAMP, to a tolerable level to the protected IC.

8.2 Typical Application

The TPD2E009 device is typically used to protect a single high-speed differential pair. Multiple TPD2E009 devices can be used to provide protection for connectors with multiple differential data lanes. This example is applicable to many interface types including:

  • HDMI
  • USB
  • eSATA
  • ethernet interfaces

TPD2E009 Schematic.gifFigure 7. TPD2E009 in a High-Speed Interface

8.2.1 Design Requirements

For this design example, TPD2E009 is used to protect any differential data pair meeting the design requirements shown in the following table.

DESIGN PARAMETER VALUE
Maximum signal range on D+ and D– 0 V to 5.5 V
Maximum Operating Frequency 3 GHz

8.2.2 Detailed Design Procedure

To begin the design process, some parameters must be decided upon; the designer must know the following:

  • The signal voltage range on the protected lines
  • The maximum operating frequency

8.2.3 Application Curves

TPD2E009 eye_with_33_lvs953.gifFigure 8. Eye Diagram With TPD2E009
(3.3-Gbps Data Rate)
(3-Pin DBZ Package)
TPD2E009 eye_with_50_lvs953.gifFigure 10. Eye Diagram With TPD2E009
(5-Gbps Data Rate)
(3-Pin DBZ Package)
TPD2E009 eye_with_60_lvs953.gifFigure 12. Eye Diagram With TPD2E009
(6-Gbps Data Rate)
(3-Pin DBZ Package)
TPD2E009 eye_without_33_lvs953.gifFigure 9. Eye Diagram Without TPD2E009
(3.3-Gbps Data Rate)
(3-Pin DBZ Package)
TPD2E009 eye_without_50_lvs953.gifFigure 11. Eye Diagram Without TPD2E009
(5-Gbps Data Rate)
(3-Pin DBZ Package)
TPD2E009 eye_without_60_lvs953.gifFigure 13. Eye Diagram Without TPD2E009
(6-Gbps Data Rate)
(3-Pin DBZ Package)