SLVSDG5C
March 2016 – August 2020
TPD3S014-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings—AEC Specification
6.3
ESD Ratings—IEC Specification
6.4
ESD Ratings—ISO Specification
6.5
Recommended Operating Conditions
6.6
Thermal Information
6.7
Electrical Characteristics: TJ = TA = 25°C
6.8
Electrical Characteristics: –40°C ≤ TA ≤ 105°C
6.9
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Undervoltage Lockout (UVLO)
8.3.2
Enable
8.3.3
Internal Charge Pump
8.3.4
Current Limit
8.3.5
Output Discharge
8.3.6
Input and Output Capacitance
8.4
Device Functional Modes
8.4.1
Operation With VIN < 4 V (Minimum VIN)
8.4.2
Operation With EN Control
8.4.3
Operation of Level 4 IEC 61000-4-2 ESD Protection
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Implementing Active Low Logic
9.2.4
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
11.3
Power Dissipation and Junction Temperature
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Support Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DBV|6
MPDS026Q
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsdg5c_oa
slvsdg5c_pm
6.4
ESD Ratings—ISO Specification
VALUE
UNIT
V
(ESD)
Electrostatic discharge
ISO 10605 330 pF, 330 Ω, V
OUT
, Dx pins
Contact discharge
(1)
±8000
V
Air-gap discharge
(1)
±15000
(1)
V
OUT
was tested on a PCB with input and output bypassing capacitors of 0.1 µF and 120 µF, respectively.