To properly implement your USB port with the TPD3S014-Q1, the first step is to determine what type of USB port is implemented in the system, whether it be a Standard Downstream Port (SDP), Charging Downstream Port (CDP), or Dedicated Charging Port (DCP); this informs us what maximum continuous operating current will be on VBUS. In our example, we are implementing an SDP port, so the maximum continuous current allowed to be pulled by a device is 500 mA. Therefore, we must choose a current limit switch that is 5.25 V tolerant, can handle 500 mA continuous DC current, and has a current limit point is above 500 mA so it will not current limit during normal operation. The TPD3S014-Q1 is therefore the best choice for this application, as it has these features, and in fact was specifically designed for this application.

The next decision point is choosing the input and output capacitors for the current limit switch. A minimum of 0.1 µF is always recommended on the IN pin. For the OUT pin on VBUS, USB standard requires a minimum of 120 µF; typically a 150 µF capacitor is used. The purpose of the capacitance requirement on the VBUS line in the USB specification is to prevent the adjacent USB port's VBUS voltage from dropping more than 330 mV during a hot-plug or fault occurrence on the VBUS pin of one USB port. Hot-plugs and fault conditions on one USB port must not disturb the normal operation of an adjacent USB port; therefore, it is possible to use an output capacitance lower than 120 µF if the system is able to keep voltage droops on adjacent USB ports less than or equal to 330 mV. For example, if the DC/DC powering VBUS has a fast transient response, 120 µF may not be required.

If the USB port is powered from a shared system 5 V rail, a system designer may desire to use an input capacitor larger than 0.1 µF on the IN pin. This is largely dependent on the PCB layout and parasitics, as well as your maximum tolerated voltage droop on the shared rail during transients. For more information on choosing input and output capacitors, see the Input and Output Capacitance section.

The EN pin controls the on and off state of the device, and typically is connected to the system processor for power sequencing. However, the EN pin can also be shorted to the IN pin to always have the TPD3S014-Q1 on when 5 V power supply on; this also saves a GPIO pin on your processor.

For a USB port with High-Speed 480 Mbps operation, low capacitance TVS ESD protection diodes are required to protect the D+ and D– lines in the event of system level ESD event. The TPD3S014-Q1 has 2-channels of low capacitance TVS ESD protection diodes integrated. When placed near the USB connector, the TPD3S014-Q1 offers little or no signal distortion during normal operation. The TPD3S014-Q1 also ensures that the core system circuitry is protected in the event of an ESD strike. PCB layout is critical when implementing TVS ESD protection diodes in your system. See the Layout section for proper guidelines on routing your USB lines with the TPD3S014-Q1.