SLVSDH9D March   2016  – August 2020 TPD3S716-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings—AEC Specification
    3. 6.3 ESD Ratings—IEC Specification
    4. 6.4 ESD Ratings—ISO Specification
    5. 6.5 Recommended Operating Conditions
    6. 6.6 Thermal Information
    7. 6.7 Electrical Characteristics
    8. 6.8 Timing Characteristics
    9. 6.9 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  AEC-Q100 Qualified
      2. 8.3.2  Short-to-Battery and Short-to-Ground Protection on VBUS_CON
      3. 8.3.3  Short-to-Battery and Short-to-VBUS Protection on VD+, VD–
      4. 8.3.4  ESD Protection on VBUS_CON, VD+, VD–
      5. 8.3.5  Low RON nFET VBUS Switch
      6. 8.3.6  High Speed Data Switches
      7. 8.3.7  Adjustable Hiccup Current Limit up to 2.4-A
      8. 8.3.8  Fast Over-Voltage Response Time
      9. 8.3.9  Independent VBUS and Data Enable Pins for Configuring both Host and Client/OTG Mode
      10. 8.3.10 Fault Output Signal
      11. 8.3.11 Thermal Shutdown Feature
      12. 8.3.12 16-Pin SSOP Package
      13. 8.3.13 Reverse Current Detection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation
      2. 8.4.2 Overvoltage Condition
      3. 8.4.3 Overcurrent Condition
      4. 8.4.4 Short-Circuit Condition
      5. 8.4.5 Device Logic Table
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Short-to-Battery Tolerance
        2. 9.2.2.2 Maximum Current on VBUS
        3. 9.2.2.3 Power Dissipation and Junction Temperature
        4. 9.2.2.4 USB Data Rate
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
    1. 10.1 VBUS Path
    2. 10.2 VIN Pin
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Layout Optimized for Thermal Performance
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.7 Electrical Characteristics

over operating free-air temperature range, VEN = 0 V, DEN = 0 V, VBUS_SYS = 5 V, VIN = 3.3 V, VD+/VD–/D+/D–/VBUS_CON = float (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT CONSUMPTION
IVBUS_SLEEP VBUS Sleep current consumption Measured at VBUS_SYS pin, VEN = 5 V, DEN = 5 V 45 150 µA
IVBUS VBUS Operating current consumption Measured at VBUS_SYS pin 285 380 µA
IVIN Leakage current for VIN Measured at VIN pin, VIN = 3.6 V 12 20 µA
ION(LEAK) Leakage into VBUS_SYS while shorted to battery and powered on Measured flowing into VBUS_SYS pin, VBUS_SYS = 5 V, VBUS_CON = 18 V 225 300 µA
IOFF(LEAK) Leakage through VBUS path while shorted to battery and unpowered Measured flowing out of VBUS_SYS pin, VBUS_SYS = 0 V, VBUS_CON = 18 V 50 µA
ID(OFF_LEAK) Leakage out of data path while shorted to battery and unpowered Measured flowing out of D+ or D– pins, VBUS_SYS = 0 V, VD+ or VD– = 18 V, VIN = 0 V, D+/D– = 0 V –1 1 µA
ID(ON_LEAK) Leakage out of data path while shorted to battery and powered on Measured flowing out of D+ or D– pins, VBUS_SYS = 5 V, VD+ or VD– = 18 V, VIN = 3.3 V, D+/D– = 0 V –1 1 µA
IVD(OFF_LEAK) Leakage into data path while shorted to battery and unpowered Measured flowing in to VD+ or VD– pins, VBUS_SYS = 0 V, VD+ or VD– = 18 V, VIN = 0 V, D+/D– = 0 V 85 µA
IVD(ON_LEAK) Leakage into data path while shorted to battery and powered on Measured flowing in to VD+ or VD– pins, VBUS_SYS = 5 V, VD+ or VD– = 18 V, VIN = 3.3 V D+/D– = 0 V 85 µA
VIN PIN
VUVLO(RISING) Undervoltage lockout rising for VIN VIN Ramp VIN up until VBUS and Data FETs turn on, VEN =0 V, DEN = 0 V 2.6 2.7 2.9 V
VUVLO(FALLING) Undervoltage lockout falling for VIN Ramp VIN down until VBUS and Data FETs turn off, VEN =0 V, DEN = 0 V 2.5 2.6 2.8
VEN, DEN, FLT PINS
VIH High-level input voltage VEN, DEN Set VEN ( DEN)= 0 V; Sweep VEN ( DEN) to 1.4 V; Measure when VBUS (Data) FET turns off 1.2 V
VIL Low-level input voltage VEN, DEN Set VEN ( DEN) = 3.3 V; Sweep VEN ( DEN) from 3.3 V to 0.5 V; Measure when VBUS (Data) FET turns on 0.8 V
IIL Input Leakage Current VEN, DEN V( VEN) (V( DEN))= 3.3 V ; Measure Current into VEN ( DEN) pin 1 µA
VOL Low-level output voltage FLT IOL = 3 mA 0.4 V
OCP CIRCUIT—VBUS
ILIM Overcurrent limit, RADJ = 280 kΩ ± 1% VBUS Progressively load VBUS_CON until device asserts FLT 505 620 mA
ILIM Overcurrent limit, RADJ = 158 kΩ ± 1% VBUS Progressively load VBUS_CON until device asserts FLT 0.905 1.1 A
ILIM Overcurrent limit, RADJ = 143 kΩ ± 1% VBUS Progressively load VBUS_CON until device asserts FLT 1.005 1.2 A
ILIM Overcurrent limit, RADJ = 93.1 kΩ ± 1% VBUS Progressively load VBUS_CON until device asserts FLT 1.505 1.8 A
ILIM Overcurrent limit, RADJ = 76.8 kΩ ± 1% VBUS Progressively load VBUS_CON until device asserts FLT 1.8 2.16 A
ILIM Overcurrent limit, RADJ = 66.5 kΩ ± 1% VBUS Progressively load VBUS_CON until device asserts FLT 2.105 2.57 A
ILIM Overcurrent limit, RADJ = 57.6 kΩ ± 1% VBUS Progressively load VBUS_CON until device asserts FLT 2.405 2.93 A
ILIM Overcurrent limit, IADJ = GND VBUS Progressively load VBUS_CON until device asserts FLT 550 700 850 mA
ILIM Overcurrent limit, IADJ = VBUS_SYS VBUS Progressively load VBUS_CON until device asserts FLT 1.1 1.4 1.7 A
OVER TEMPERATURE PROTECTION
TSD(RISING) The rising over-temperature protection shutdown threshold VBUS_SYS = 5 V, VEN = 0 V, DEN = 0 V, No Load on VBUS_CON, TA stepped up until FLT is asserted 150 165 180 ℃
TSD(FALLING) The falling over-temperature protection shutdown threshold VBUS_SYS = 5 V, VEN = 0 V, DEN = 0 V, No Load on VBUS_CON, TA stepped down from TSD(RISING) until FLT is deasserted 125 130 142 ℃
TSD(HYST) The over-temperature protection shutdown threshold hysteresis TSD(RISING) – TSD(FALLING) 10 35 55 ℃
OVP CIRCUIT—VBUS
VOVP(RISING) Input overvoltage protection threshold VBUS_CON Increase VBUS_CON from 5 V to 7 V. Measure when FLT is asserted 5.6 5.8 6 V
VHYS(OVP) Hysteresis on OVP VBUS_CON Difference between rising and falling OVP thresholds on VBUS_CON 50 mV
VOVP(FALLING) Input overvoltage protection threshold VBUS_CON Decrease VBUS_CON from 7 V to 5 V. Measure when FLT is deasserted 5.52 5.75 5.98 V
VREV_SUPPLY(RISING) Reverse supply detection threshold VBUS_CON – VBUS_SYS Set VBUS_SYS to 5 V. Increase VBUS_CON from VBUS_SYS to VBUS_SYS + 300 mV. Measure the value of VBUS_CON – VBUS_SYS when FLT asserts.
25°C ≤ TA ≤ 125°C		 140 200 260 mV
VREV_SUPPLY(FALLING) Reverse supply detection threshold VBUS_CON – VBUS_SYS Set VBUS_SYS to 5 V. Decrease VBUS_CON from VBUS_SYS + 300 mV to VBUS_SYS. Measure the value of VBUS_CON – VBUS_SYS when FLT deasserts.
25°C ≤ TA ≤ 125°C		 70 120 165 mV
VREV_SUPPLY(HYST) Hysteresis on reverse supply detection VBUS_CON – VBUS_SYS Difference between rising and falling reverse supply detection thresholds 80 mV
VUVLO(SYS_RISING) Undervoltage lockout rising for VBUS_SYS VBUS_SYS VBUS_SYS voltage rising from 0 V to 5 V 3.1 3.3 3.6 V
VHYS(UVLO_SYS) VBUS_SYS UVLO Hysteresis VBUS_SYS Difference between rising and falling UVLO thresholds on VBUS_SYS 50 75 100 mV
VUVLO(SYS_FALLING) Undervoltage lockout falling for VBUS_SYS VBUS_SYS VBUS_SYS voltage falling from 5 V to 2.9 V 3 3.2 3.5 V
VSHRT(RISING) Short-to-ground comparator rising threshold VBUS_CON Increase VBUS_CON voltage from 0 V until the device transitions from the short-circuit to over-current mode of operation 2.5 2.6 2.7 V
VSHRT(FALLING) Short-to-ground comparator falling threshold VBUS_CON Set VBUS_SYS = 5 V; VIN = 3.3 V; VEN = 0 V, DEN = 0 V; Decrease VBUS_CON voltage from 5 V until the device transitions from the over-current to short-circuit mode of operation 2.4 2.5 2.6 V
VSHRT(HYST) Short-to-ground comparator hysteresis VBUS_CON Difference between VSHRT(RISING) and VSHRT(FALLING) 125 mV
ISHRT Short-to-ground current source VBUS_CON Current sourced from VBUS_SYS when device is in short-circuit mode 150 350 mA
OVP CIRCUIT—VD+/VD–
VOVP(RISING) Input overvoltage protection threshold VD+/VD– Increase VD+ or VD– (with D+ and D–) from 3.3 V to 4.5 V. Measure the value at which FLT is asserted VIN + 0.6 VIN + 0.8 VIN + 1 V
VHYS(OVP) Hysteresis on OVP VD+/VD– Difference between rising and falling OVP thresholds on VD+/VD– 50 mV
VOVP(FALLING) Input overvoltage protection threshold VD+/VD– Decrease VD+ or VD– (with D+ or D–) from 4.5 V to 2 V. Measure the value at FLT is deasserted VIN + 0.525 VIN + 0.75 VIN + 0.975 V
SHORT TO BATTERY
V(VBUS_STB) VBUS hotplug short-to-battery tolerance VBUS_CON Charge battery-equivalent capacitor to test voltage then discharge to pin under test through a 1 meter, 18 gauge wire. (See Figure 7-1 for more details) 18 V
V(DATA_STB) Data line hotplug short-to-battery tolerance VD+/VD– 18 V
DATA LINE SWITCHES—VD+ to D+ or VD– to D–
CON Equivalent On Capacitance Capacitance of D+/D– switches when enabled – measure on connector side at VDx = 0.4 V 6.9 pF
RON On Resistance Measure resistance between D+ and VD+ or D– and VD–, voltage between 0 V and 0.4 V 4 6.5 Ω
RON(Flat) On Resistance flatness Measure resistance between D+ and VD+ or D– and VD–, sweep voltage between 0 V and 0.4 V 0.2 1 Ω
BWON On Bandwidth (–3dB) Measure S21 bandwidth from D+ to VD+ or D– to VD– with voltage swing = 400 mVpp, VCM= 0.2 V 910 MHz
BWON_DIFF On Bandwidth (–3dB) Measure SDD21 bandwidth from D+ to VD+ and D– to VD– with voltage swing = 800 mVpp differential, VCM= 0.2 V 1050 MHz
Xtalk Crosstalk Measure S21 bandwidth from D+ to VD– or D– to VD+ with voltage swing = 400 mVpp. Make sure to terminate open sides to 50 ohms. f = 480 MHz –28 dB
nFET SWITCH—VBUS
R(DISCHARGE) Output discharge resistance VEN = 5 V, DEN = 5 V, Set VBUS_CON = 5 V and measure current flow to ground 18 30 kΩ
RON VBUS path ON resistance VBUS_CON = 5 V, IOUT = 1.5 A. See Figure 9-8 for a plot of the maximum VBUS RON possible at a given junction temperature 63 135 mΩ