TPD4E02B04-Q1 4-Channel ESD Protection Diode for USB Type-C and HDMI 2.0

1 Features

AEC-Q101 Qualified
IEC 61000-4-2 Level 4 ESD Protection
- ±12-kV Contact Discharge
- ±15-kV Air Gap Discharge
ISO 10605 (330 pF, 330 Ω) ESD Protection
- ±10 kV Contact Discharge
- ±10-kV Air Gap Discharge
IEC 61000-4-4 EFT Protection
- 80 A (5/50 ns)
IEC 61000-4-5 Surge Protection
- 2 A (8/20 µs)
IO Capacitance:
- 0.25 pF (Typical)
DC Breakdown Voltage: 5.5 V (Minimum)
Ultra Low Leakage Current: 10 nA (Maximum)
Low ESD Clamping Voltage: 8.8 V at 5-A TLP
Supports High Speed Interfaces up to 10 Gbps
Industrial Temperature Range: –40°C to +125°C
Easy Flow-Through Routing Package

2 Applications

End Equipment
- Head Unit
- Rear Seat Entertainment
- Telematics
- USB Hub
- Cluster
- Body Control Module
- Media Interface
Interfaces
- USB Type-C
- USB 3.1 Gen 2
- HDMI 2.0/1.4
- USB 3.0
- DisplayPort 1.3
- 10/100/1000 Mbps Ethernet

3 Description

The TPD4E02B04-Q1 is an automotive-qualified bidirectional TVS ESD protection diode array for USB Type-C and HDMI 2.0 circuit protection. The TPD4E02B04-Q1 is rated to dissipate ESD strikes up to 10 kV per ISO 10605 (330 pF, 330 Ω) ESD standard. The TPD4E02B04 is also rated to dissipate ESD strikes at the maximum level specified in the IEC 61000-4-2 international standard (Level 4).

This device features a 0.25-pF IO capacitance per channel making it ideal for protecting high-speed interfaces up to 10 Gbps such as USB 3.1 Gen2. The low dynamic resistance and low clamping voltage ensure system level protection against transient events.

The TPD4E02B04-Q1 is offered in the industry standard USON-10 (DQA) package. The package features flow-through routing and 0.5-mm pin pitch easing implementation and reducing design time.

This device is also available without automotive qualification: TPD4E02B04.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
TPD4E02B04-Q1	USON (10)	2.50 mm × 1.00 mm

For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Schematic

4 Revision History

Changes from * Revision (June 2017) to A Revision

First public release of data sheetGo
Changed ISO airgap rating to 10 kV Go
Changed Contact rating to 10 kVGo
Changed Interfaces Ethernet to 10/100/1000 MbpsGo

5 Pin Configuration and Functions

DQA Package

10-Pin USON

Top View

Pin Functions

PIN		TYPE	DESCRIPTION
NAME	NO.	TYPE	DESCRIPTION
GND	3	Ground	Ground. Connect to ground
GND	8	Ground	Ground. Connect to ground
IO1	1	I/O	ESD protected channel
IO2	2
IO3	4
IO4	5
NC	6	NC	Not connected; Used for optional straight-through routing. Can be left floating or grounded
NC	7
NC	9
NC	10

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
Electrical fast transient	IEC 61000-4-5 (5/50 ns) at 25°C		80	A
Peak pulse	IEC 61000-4-5 power (t_p - 8/20 µs) at 25°C		17	W
Peak pulse	IEC 61000-4-5 Ccurrent (t_p - 8/20 µs) at 25°C		2	A
T_A	Operating free-air temperature	–40	125	°C
T_stg	Storage temperature	–65	155	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings—AEC Specification

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per AEC Q100-002⁽¹⁾	±2500	V
V_(ESD)	Electrostatic discharge	Charged-device model (CDM), per AEC Q100-011	±1000	V

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 ESD Ratings—IEC Specification

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	IEC 61000-4-2 contact discharge	±12000	V
V_(ESD)	Electrostatic discharge	IEC 61000-4-2 air-gap discharge	±15000	V

6.4 ESD Ratings—ISO Specification

				VALUE	UNIT
V_(ESD)	Electrostatic discharge	ISO 10605 330 pF, 330 Ω, IO	Contact discharge	±10000	V
V_(ESD)	Electrostatic discharge	ISO 10605 330 pF, 330 Ω, IO	Air-gap discharge	±10000	V

6.5 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	MAX	UNIT
V_IO	Input pin voltage	–3.6	3.6	V
T_A	Operating free-air temperature	–40	125	°C

6.6 Thermal Information

THERMAL METRIC⁽¹⁾		TPD4E02B04-Q1	UNIT
		DQA (USON)
		10 PINS
R_θJA	Junction-to-ambient thermal resistance	348.7	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	214.1	°C/W
R_θJB	Junction-to-board thermal resistance	270.7	°C/W
ψ_JT	Junction-to-top characterization parameter	81.7	°C/W
ψ_JB	Junction-to-board characterization parameter	270.7	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	N/A	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.7 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_RWM	Reverse stand-off voltage	I_IO < 10 nA	–3.6		3.6	V
V_BRF	Breakdown voltage, any IO pin to GND⁽¹⁾	I_IO = 1 mA, T_A = 25°C	5.5	6.4	7.5	V
V_BRR	Breakdown voltage, GND to any IO pin⁽¹⁾	I_IO = 1 mA, T_A = 25°C	–5.5	–6.4	–7.5	V
V_HOLD	Holding voltage⁽²⁾	I_IO = 1 mA		5.8		V
V_CLAMP	Clamping voltage	I_PP = 1 A, TLP, from IO to GND		6.6		V
		I_PP = 5 A, TLP, from IO to GND		8.8
		I_PP = 1 A, TLP, from GND to IO		6.6
		I_PP = 5 A, TLP, from GND to IO		8.8
I_LEAK	Leakage current, any IO to GND	V_IO = ±2.5 V			10	nA
R_DYN	Dynamic resistance	IO to GND		0.47		Ω
R_DYN	Dynamic resistance	GND to IO		0.47		Ω
C_L	Line capacitance	V_IO = 0 V, f = 1 MHz, IO to GND, T_A = 25°C		0.25	0.33	pF
ΔC_L	Variation of line capacitance	Delta of capacitance between any two IO pins, V_IO = 0 V, f = 1 MHz, T_A = 25°C, GND = 0 V		0.01	0.07	pF
C_CROSS	Channel to channel capacitance	Capacitance from one IO to another, V_IO = 0 V, f = 1 MHz, GND = 0 V		0.13	0.16	pF

(1) V_BRF and V_BRR are defined as the voltage when 1 mA is applied in the positive-going direction, before the device latches into the snapback state.

(2) V_HOLD is defined as the voltage when 1 mA is applied in the negative-going direction, after the device has successfully latched into the snapback state.