SLVSBQ8E
December 2012 – October 2024
TPD4E1B06
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Ultra Low Leakage Current 0.5 nA (Maximum)
6.3.2
Transient Protection for 4 I/O Lines
6.3.3
I/O Capacitance 0.7 pF (Typical)
6.3.4
Bi-Directional (ESD) Protection Diode Array
6.3.5
Low ESD Clamping Voltage
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Signal Range on IO1, IO2, IO3, and IO4 Pins
7.2.2.2
Operating Frequency
7.2.3
Application Curves
7.3
Layout
7.3.1
Layout Guidelines
7.3.2
Layout Examples
8
Device and Documentation Support
8.1
Receiving Notification of Documentation Updates
8.2
Support Resources
8.3
Trademarks
8.4
Electrostatic Discharge Caution
8.5
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DCK|6
MPDS114E
DRL|6
MPDS159H
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsbq8e_oa
slvsbq8e_pm
1
Features
Ultra low leakage current 0.5nA (maximum)
Transient protection for 4 I/O lines:
IEC 61000-4-2 Contact Discharge ±12kV
IEC 61000-4-2 Air-Gap Discharge ±15kV
IEC 61000-4-5 Surge 3.0A (8/20µs)
I/O capacitance 0.7pF (typical)
Bi-directional ESD protection diode array
Low ESD clamping voltage
Industrial temperature range: –40°C to 125°C
Small, easy-to-route DRL and DCK packages