The TPD4E6B06 is a four channel electrostatic discharge (ESD) protection device in an ultra small DPW package. It is the industry’s smallest 4-channel transient voltage suppressor (TVS) diode with a 0.48-mm pitch. This larger pitch helps save on printed-circuit board (PCB) manufacturing costs. The device provides IEC61000-4-2 compliance up to 15-kV contact discharge. It has an ESD clamp circuit with back-to-back diodes for bipolar-bidirectional signal support. The 4.8-pF (typical) line capacitance is suitable for a wide range of applications supporting data rates up to 700 MHz.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPD4E6B06 | X2SON (4) | 0.80 mm × 0.80 mm |
Changes from B Revision (February 2017) to C Revision
Changes from A Revision (December 2015) to B Revision
Changes from * Revision (May 2014) to A Revision
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NO | NAME | ||
1 | IO1 | IO | ESD protected line |
2 | IO2 | IO | ESD protected line |
3 | IO3 | IO | ESD protected line |
4 | IO4 | IO | ESD protected line |
5 | GND | — | Ground |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Peak pulse | IEC 61000-4-5 Current (tp – 8/20 µs)(4) | 3 | A | |
IEC 61000-4-5 Power (tp – 8/20 µs)(4) | 40 | W | ||
Operating temperature | –40 | 125 | °C | |
Storage temperature | Tstg | –65 | 155 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) | ±2000 | V |
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) | ±500 |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VIO | Input pin voltage | –5.5 | 5.5 | V |
TA | Operating free-air temperature | –40 | 125 | °C |
THERMAL METRIC(1) | TPD4E6B06 | UNIT | |
---|---|---|---|
DPW (X2SON) | |||
5 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 291.8 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 224.2 | °C/W |
RθJB | Junction-to-board thermal resistance | 245.8 | °C/W |
ψJT | Junction-to-top characterization parameter | 31.4 | °C/W |
ψJB | Junction-to-board characterization parameter | 245.6 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 195.4 | °C/W |
PARAMETER | TEST CONDITION | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
VRWM | Reverse stand-off voltage | IIO = 10 µA | –5.5 | 5.5 | V | |
VBRF | Break-down voltage | IIO to GND = 1 mA | 6 | V | ||
VBRR | Break-down voltage | IGND to IO = 1 mA | 6 | V | ||
ILEAK | Leakage current | VIO = 5 V | 100 | nA | ||
VCLAMP | Clamp voltage with ESD strike | I = 1 A, IO to GND, 8/20 μs(1) | 10 | V | ||
I = 5 A, IO to GND, 8/20 μs(1) | 13 | V | ||||
I = 1 A, IO to GND, 8/20 μss(1) | 9 | V | ||||
I = 5 A, IO to GND, 8/20 μs(1) | 13 | V | ||||
RDYN | Dynamic resistance | Any IO to GND pin(2) | 0.45 | Ω | ||
GND to any IO pin(2) | 0.42 | Ω | ||||
CL | IO capacitance | VIO = 2.5 V; ƒ = 10 MHz | 4.8 | 7 | pF |
The TPD4E6B06 is a four channel ESD Protection device in an ultra small DPW package. It is the industry’s smallest 4-CH ESD protection device with 0.48-mm pitch. This larger pitch helps save on PCB manufacturing costs. The device provides IEC61000-4-2 compliance up to 15-kV contact discharge. It has an ESD clamp circuit with back-to-back diodes for bipolar/bidirectional signal support. The 4.8-pF (Typical) line capacitance is suitable for a wide range of applications supporting frequencies up to 700 MHz.
The IO pins can withstand ESD events up to ±15-kV contact and ±15-kV air. An ESD-surge clamp diverts the current to ground.
The IO pins can withstand surge events up to 3 A and 40 W (8/20 µs waveform). An ESD-surge clamp diverts this current to ground.
The capacitance between any IO pin to ground is 4.8 pF (typical). This capacitance supports frequencies up to 700 MHz.
The low RDYN of 0.75 Ω (typical) allows for lower clamping voltages.
The DC breakdown voltage of any IO pin is a minimum of ±6 V. This ensures that sensitive equipment is protected from surges above the reverse standoff voltage of ±5.5 V (minimum).
The IO pins feature an ultra-low leakage current of 100 nA (maximum) with a bias of 2.5 V.
The IO pins feature an ESD clamp capable of clamping the voltage to 10 V (IO to GND) or 9 V (GND to IO) of IEC61000-4-5 surge when IPP = 1 A.
This device features an industrial operating range of –40°C to +125°C.
The small 0.8 mm × 0.8 mm package size saves board space and makes it easy to add ESD protection.
The TPD4E6B06 is a passive integrated circuit that triggers when voltages are above VBRF or VBRR. During ESD events, voltages as high as ±15 kV (air) can be directed to ground via the internal diode network. Once the voltages on the protected line fall below the trigger levels of the TPD4E6B06 (usually within 10s of nano-seconds) the device reverts to passive.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The TPD4E6B06 is a diode array type TVS. These low capacitance types of TVSs are typically used to provide a path to ground for dissipating ESD events on hi speed signal lines between a human interface connector and a system. During high voltage ESD strikes, the device clamps to a safe voltage level to protect the system.
The typical application of the TPD4E6B06 is to be placed in between the connector and the system. The low capacitance of the TPD4E6B06 gives flexibility in the end application, as it can be used on many different high speed interfaces.
Table 1 shows the design parameters.
DESIGN PARAMETER | EXAMPLE VALUE |
---|---|
Signal range on data lines | –5.5 V to 5.5 V |
Operating frequency | Up to 700 MHz |
The designer needs to know the following:
The TPD4E6B06 has 4 protection channels for signal lines. Any I/O supports a signal range of –5.5 V to
5.5 V.
The TPD4E6B06 has 4.8 pF of capacitance (Typical), supporting up to 700 MHz frequencies.