SLVSCK3C May   2014  – February 2017 TPD4E6B06

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 IEC 61000-4-2 Level 2 ESD Protection
      2. 7.3.2 IEC 61000-4-5 Surge Protection
      3. 7.3.3 IO Capacitance
      4. 7.3.4 RDYN
      5. 7.3.5 DC Breakdown Voltage
      6. 7.3.6 Ultra-Low Leakage Current
      7. 7.3.7 Clamping Voltage
      8. 7.3.8 Industrial Temperature Range
      9. 7.3.9 Space Saving DPW Package
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Signal Range
        2. 8.2.2.2 Operating Frequency
      3. 8.2.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)(2)(3)
MIN MAX UNIT
Peak pulse IEC 61000-4-5 Current (tp – 8/20 µs)(4) 3 A
IEC 61000-4-5 Power (tp – 8/20 µs)(4) 40 W
Operating temperature –40 125 °C
Storage temperature Tstg –65 155 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Absolute maximum ratings apply over recommended junction temperature range.
(3) Voltages are with respect to GND unless otherwise noted.
(4) Measured at 25°C.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Pins listed as 2 kV may actually have higher performance.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. Pins listed as 500 V may actually have higher performance.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VIO Input pin voltage –5.5 5.5 V
TA Operating free-air temperature –40 125 °C

6.4 Thermal Information

THERMAL METRIC(1) TPD4E6B06 UNIT
DPW (X2SON)
5 PINS
RθJA Junction-to-ambient thermal resistance 291.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 224.2 °C/W
RθJB Junction-to-board thermal resistance 245.8 °C/W
ψJT Junction-to-top characterization parameter 31.4 °C/W
ψJB Junction-to-board characterization parameter 245.6 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 195.4 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

TA = –40°C to +125°C (unless otherwise specified)
PARAMETER TEST CONDITION MIN TYP MAX UNIT
VRWM Reverse stand-off voltage IIO = 10 µA –5.5 5.5 V
VBRF Break-down voltage IIO to GND = 1 mA 6 V
VBRR Break-down voltage IGND to IO = 1 mA 6 V
ILEAK Leakage current VIO = 5 V 100 nA
VCLAMP Clamp voltage with ESD strike I = 1 A, IO to GND, 8/20 μs(1) 10 V
I = 5 A, IO to GND, 8/20 μs(1) 13 V
I = 1 A, IO to GND, 8/20 μss(1) 9 V
I = 5 A, IO to GND, 8/20 μs(1) 13 V
RDYN Dynamic resistance Any IO to GND pin(2) 0.45 Ω
GND to any IO pin(2) 0.42 Ω
CL IO capacitance VIO = 2.5 V; ƒ = 10 MHz 4.8 7 pF
(1) Non-repetitive current pulse 8/20 µs exponentially decaying waveform according to IEC61000-4-5.
(2) Extraction of RDYN using least squares fit of TLP characteristics between I = 10 A and I = 20 A.

6.6 Typical Characteristics

TPD4E6B06 G001_SLVSBE2.png
Figure 1. IEC 61000-4-2 Clamping Voltage, 8-kV Contact
TPD4E6B06 G003_SLVSBE2.png
Figure 3. TLP, tPW = 100 ns, tRISE = 10 ns, IO to GND
TPD4E6B06 G005_SLVSBE2.png
Figure 5. IV Curve
TPD4E6B06 G007_SLVSBE2.png
Figure 7. Surge Curves, GND to IO
TPD4E6B06 G009_SLVSBE2.png
Figure 9. Insertion Loss
TPD4E6B06 G002_SLVSBE2.png
Figure 2. IEC 61000-4-2 Clamping Voltage, –8-kV Contact
TPD4E6B06 G004_SLVSBE2.png
Figure 4. TLP, tPW = 100 ns, tRISE = 10 ns, GND to IO
TPD4E6B06 G006_SLVSBE2.png
Figure 6. Surge Curves, IO to GND
TPD4E6B06 G008_SLVSBE2.png
Figure 8. Capacitance