SLVSA55B November   2009  – November 2016 TPD4S1394

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • IEEE 1394 Live Insertion Detection
  • ESD Protection Exceeds IEC61000-4-2 (Level 4)
    • ±15-kV Human-Body Model (HBM)
    • ±6-kV IEC 61000-4-2 Contact Discharge
  • 4-Channel Matching ESD Clamps for High-Speed Differential Lines
  • Flow-Through, Single-in-Line Pin Mapping Simplifies Board Layout
  • Available in an 8-Pin X2SON (DQL) package

2 Applications

    Firewire Interface

3 Description

The TPD4S1394 provides robust system level ESD solution for the IEEE 1394 port, along with a live insertion detection mechanism for high-speed lines interfacing a low-voltage, ESD sensitive core chipset. This device protects and monitors up to two differential input pairs. The optimized line capacitance protects the data lines with data rates in excess of 1.6 GHz without degrading signal integrity.

The TPD4S1394 incorporates a live insertion detection circuit whose output state changes when improper voltage levels are present on the input data lines. The FWPWR_EN signal controls an external FireWire port power switch. During the live insertion event if there is a floating GND or a high level signal at the D+ or D– pins, the internal comparator detects the changes and pull the FWPWR_EN signal to a low state. When FWPWR_EN is driven low, there is an internal delay mechanism preventing it from being driven to the high state regardless of the inputs to the comparator.

Additionally, the TPD4S1394 performs ESD protection on the four inputs pins: D1+, D1–, D2+, and D2–. The TPD4S1394 conforms to the IEC61000-4-2 (Level 4) ESD protection and ±15-kV HBM ESD protection. The TPD4S1394 is characterized for operation over ambient air temperature of –40°C to 85°C.

A 0.1-µF decoupling capacitor is required at VCC.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPD4S1394 X2SON (8) 2.00 mm × 1.40 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Functional Block Diagram

TPD4S1394 fbd_lvsa55.gif