The TPD5E003 is a five-channel electrostatic discharge (ESD) transient voltage suppression (TVS) device. This device offers ±15-kV IEC contact and ±15-kV air-gap (level 4) ESD protection, and features five identical ESD clamping diodes that can be used to protect either five unidirectional (0 V to 5 V) I/O lines or four bidirectional (–5 V to 5 V) I/O lines. The compact DPF package is an industry standard and is convenient for component placement in
space-constrained applications. Typical application interfaces include SIM card interfaces, audio lines (mics, earphones, and speakerphones), SD interfaces, and keypads, or other buttons. Typical end equipment includes cell phones, tablets, remote controllers, and wearables.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPD5E003 | X2SON (6) | 1.00 mm × 1.00 mm |
Changes from A Revision (January 2013) to B Revision
Changes from * Revision (December 2012) to A Revision
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
I/O | 1 | I/O | ESD Protected channel |
3 | |||
4 | |||
5 | |||
6 | |||
GND | 2 | — | Ground |
MIN | MAX | UNIT | |
---|---|---|---|
I/O voltage tolerance | 5.5 | V | |
Peak pulse current (tp = 8/20 μs), IPP | 3 | A | |
Peak pulse power (tp = 8/20 μs), PPP | 40 | W | |
Storage temperature, Tstg | –55 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±4000 | V |
Charged device model (CDM), per JEDEC specification JESD22-C101(2) | ±1500 |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | IEC 61000-4-2 contact discharge | ±15000 | V |
IEC 61000-4-2 air-gap discharge | ±15000 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
Operating free-air temperature, TA | –40 | 125 | °C | ||
Operating voltage | Pin 1, 3, 4, 5, 6 to Pin 2 | 0 | 5 | V |
THERMAL METRIC(1) | TPD5E003 | UNIT | |
---|---|---|---|
DPF (X2SON) | |||
6 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 246.7 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 87.8 | °C/W |
RθJB | Junction-to-board thermal resistance | 187.1 | °C/W |
ψJT | Junction-to-top characterization parameter | 2.6 | °C/W |
ψJB | Junction-to-board characterization parameter | 198 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 32 | °C/W |
PARAMETER | TEST CONDITION | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
VRWM | Reverse stand-off voltage | II = 0.1 µA | 5 | V | ||
ILEAK | Leakage Current | Pin 1, 3, 4, 5, or 6 = 5 V, Pin 2 = 0 V | 10 | 100 | nA | |
VCLAMP | Clamp voltage with ESD strike | IPP = 6 A, TLP, Dx pin to GND, TA = 25 °C | 13 | 15.6 | V | |
IPP = 10 A, TLP, Dx pin to GND, TA = 25 °C | 16.3 | 19.5 | V | |||
RDYN | Dynamic resistance | ITLP = 6 A to 10 A, Dx pin to GND, TA = 25 °C | 0.8 | 1 | Ω | |
ITLP = 6 A to 10 A, GND to Dx pin, TA = 25 °C | 0.3 | 0.4 | Ω | |||
CIO | IO capacitance | VIO = 2.5 V, 1 MHz, TA = 25 °C | 5.6 | 7 | 8.4 | pF |
VIO = 0 V, 1 MHz, TA = 25 °C | 8 | 10 | 12 | pF | ||
VBR | Break-down voltage | IIO = 1 mA | 6 | 7 | 8.5 | V |