SLVSDK3C September   2016  – January 2017 TPD6S300

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings—JEDEC Specification
    3. 7.3 ESD Ratings—IEC Specification
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Thermal Information
    6. 7.6 Electrical Characteristics
    7. 7.7 Timing Requirements
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 4-Channels of Short-to-VBUS Overvoltage Protection (CC1, CC2, SBU1, SBU2 Pins): 24-VDC Tolerant
      2. 8.3.2 8-Channels of IEC 61000-4-2 ESD Protection (CC1, CC2, SBU1, SBU2, DP_T, DM_T, DP_B, DM_B Pins)
      3. 8.3.3 CC1, CC2 Overvoltage Protection FETs 600 mA Capable for Passing VCONN Power
      4. 8.3.4 CC Dead Battery Resistors Integrated for Handling the Dead Battery Use Case in Mobile Devices
      5. 8.3.5 3-mm × 3-mm WQFN Package
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 VBIAS Capacitor Selection
        2. 9.2.2.2 Dead Battery Operation
        3. 9.2.2.3 CC Line Capacitance
        4. 9.2.2.4 Additional ESD Protection on CC and SBU Lines
        5. 9.2.2.5 FLT Pin Operation
        6. 9.2.2.6 How to Connect Unused Pins
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

RUK Package
20 Pin WQFN
Top View
TPD6S300 TPD6S300_Pin_Out_3.gif

Pin Functions

PIN TYPE DESCRIPTION
NO. NAME
1 C_SBU1 I/O Connector side of the SBU1 OVP FET. Connect to either SBU pin of the USB Type-C connector
2 C_SBU2 I/O Connector side of the SBU2 OVP FET. Connect to either SBU pin of the USB Type-C connector
3 VBIAS Power Pin for ESD support capacitor. Place a 0.1-µF capacitor on this pin to ground
4 C_CC1 I/O Connector side of the CC1 OVP FET. Connect to either CC pin of the USB Type-C connector
5 C_CC2 I/O Connector side of the CC2 OVP FET. Connect to either CC pin of the USB Type-C connector
6 RPD_G2 I/O Short to C_CC2 if dead battery resistors are needed. If dead battery resistors are not needed, short pin to GND
7 RPD_G1 I/O Short to C_CC1 if dead battery resistors are needed. If dead battery resistors are not needed, short pin to GND
8 GND GND Ground
9 FLT O Open drain for fault reporting
10 VPWR Power 2.7-V-3.6-V power supply
11 CC2 I/O System side of the CC2 OVP FET. Connect to either CC pin of the CC/PD controller
12 CC1 I/O System side of the CC1 OVP FET. Connect to either CC pin of the CC/PD controller
13 GND GND Ground
14 SBU2 I/O System side of the SBU2 OVP FET. Connect to either SBU pin of the SBU MUX
15 SBU1 I/O System side of the SBU1 OVP FET. Connect to either SBU pin of the SBU MUX
16 N.C. I/O Unused pin. Connect to Ground
17 N.C. I/O Unused pin. Connect to Ground
18 GND GND Ground
19 D2 I/O USB2.0 IEC ESD protection. Connect to any of the USB2.0 pins of the USB Type-C connector
20 D1 I/O USB2.0 IEC ESD protection. Connect to any of the USB2.0 pins of the USB Type-C connector
— Thermal Pad GND Internally connected to GND. Used as a heatsink. Connect to the PCB GND plane