SLIS167 August   2015 TPIC2050

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Serial I/F Write Timing Requirements
    7. 7.7 Serial I/F Read Timing Requirements
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Protect Functions
        1. 8.3.1.1 OVP
        2. 8.3.1.2 OCP and SCP
          1. 8.3.1.2.1 OCP for Step Driver
          2. 8.3.1.2.2 SCP
        3. 8.3.1.3 Thermal Protection (TSD)
        4. 8.3.1.4 Actuator Temperature Protection (ACTTIMER)
        5. 8.3.1.5 Prevent OVP 12 V (PREOVP-12V)
      2. 8.3.2 DAC Type
      3. 8.3.3 Example of 12-Bit DAC Sampling Rate for FCS/TRK/TLT
      4. 8.3.4 Digital Input Coding
    4. 8.4 Device Functional Modes
      1. 8.4.1 Differential Tilt Mode
      2. 8.4.2 Power-On Reset (POR)
        1. 8.4.2.1 RDY (Power Ready)
    5. 8.5 Programming
      1. 8.5.1 Serial Port Functional Description
      2. 8.5.2 Write Operation
      3. 8.5.3 Read Operation
      4. 8.5.4 Write and Read Operation
    6. 8.6 Register Maps
      1. 8.6.1 Register State Transition
      2. 8.6.2 DAC Register (12-Bit Write Only)
      3. 8.6.3 Control Register (8-Bit Read/Write)
      4. 8.6.4 Detailed Description of Registers
        1. 8.6.4.1  REG01 12-Bit DAC for Tilt (offset = 01h) [reset = ]
        2. 8.6.4.2  REG02 12-Bit DAC for Focus (offset = 02h) [reset = ]
        3. 8.6.4.3  REG03 12-Bit DAC for Tracking (offset = 03h) [reset = ]
        4. 8.6.4.4  REG04 12-Bit DAC for Sled1 (offset = 04h) [reset = ]
        5. 8.6.4.5  REG05 12-Bit DAC for Sled2 (offset = 05h) [reset = ]
        6. 8.6.4.6  REG06 12-Bit DAC for Stepping1 (offset = 06h) [reset = ]
        7. 8.6.4.7  REG07 12-Bit DAC for Stepping2 (offset = 07h) [reset = ]
        8. 8.6.4.8  REG08 12-Bit DAC for Spindle (offset = 08h) [reset = ]
        9. 8.6.4.9  REG09 12-Bit DAC for Load (offset = 09h) [reset = ]
        10. 8.6.4.10 REG0A 12-Bit DAC for Laser Diode Driver (offset = 0Ah) [reset = ]
        11. 8.6.4.11 REG70 8-Bit Control Register for DriverEna (offset = 70h) [reset = ]
        12. 8.6.4.12 REG71 8-Bit Control Register for FuncEna (offset = 71h) [reset = ]
        13. 8.6.4.13 REG72 8-Bit Control Register for ACTCfg (offset = 72h) [reset = ]
        14. 8.6.4.14 REG73 8-Bit Control Register for Parm0 (offset = 73h) [reset = ]
        15. 8.6.4.15 REG74 8-Bit Control Register for SIFCfg (offset = 74h) [reset = ]
        16. 8.6.4.16 REG75 8-Bit Control Register for Parm1 (offset = 75h) [reset = ]
        17. 8.6.4.17 REG76 8-Bit Control Register for WriteEna (offset = 76h) [reset = ]
        18. 8.6.4.18 REG77 8-Bit Control Register for ClrReg (offset = 77h) [reset = ]
        19. 8.6.4.19 REG78 8-Bit Control Register for ActTemp (offset = 78h) [reset = ]
        20. 8.6.4.20 REG79 8-Bit Control Register for UVLOMon (offset = 79h) [reset = ]
        21. 8.6.4.21 REG7A 8-Bit Control Register for TSDMon (offset = 7Ah) [reset = ]
        22. 8.6.4.22 REG7B 8-Bit Control Register for OCPMon (offset = 7Bh) [reset = ]
        23. 8.6.4.23 REG7C 8-Bit Control Register for TempMon (offset = 7Ch) [reset = ]
        24. 8.6.4.24 REG7E 8-Bit Control Register for Version (offset = 7Eh) [reset = ]
        25. 8.6.4.25 REG7F 8-Bit Control Register for Status (offset = 7Fh) [reset = ]
        26. 8.6.4.26 REG61 8-Bit Control Register for SPM1 (offset = 61h) [reset = ]
        27. 8.6.4.27 REG62 8-Bit Control Register for SPM2 (offset = 62h) [reset = ]
        28. 8.6.4.28 REG6B 8-Bit Control Register for DisProt (offset = 6Bh) [reset = ]
        29. 8.6.4.29 REG6C 8-Bit Control Register for STPCfg (offset = 6Ch) [reset = ]
        30. 8.6.4.30 REG6E 8-Bit Control Register for UtilCfg (offset = 6Eh) [reset = ]
        31. 8.6.4.31 REG6F 8-Bit Control Register for MonitorSet (offset = 6Fh) [reset = ]
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1  Voltage Monitoring
      2. 9.1.2  Spindle Motor Driver Operating Sequence
      3. 9.1.3  Auto Short Brake Function
      4. 9.1.4  Spindle PWM Control
      5. 9.1.5  Spindle Driver Current Limiting Circuit
      6. 9.1.6  Sled Driver Part
      7. 9.1.7  Stepping Driver Part
      8. 9.1.8  Focus/Track/Tilt Driver Part
      9. 9.1.9  Load Driver Part
      10. 9.1.10 End Detect Function
      11. 9.1.11 Load Tray Lock Detect Function
      12. 9.1.12 Three-Beam Laser Diode Driver
      13. 9.1.13 Monitor Signal on GPOUT
      14. 9.1.14 Example Timing of Target Control System
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

  1. CV3P3V, CA5V, and C10V requires external capacitor. Because these are reference voltage for device, locate the capacitor as close to device as possible. Keep away from noise source.
  2. SCLK ground shielding is recommended.

11.2 Layout Example

TPIC2050 layout_ex_slis167.gif
A. GND shield is recommended for SCLK.
Figure 64. Layout Example Between TPIC2050 and MPU