SLIS166 July   2015 TPIC2060A

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Serial I/F Write Timing Requirements
    7. 7.7 Serial I/F Read Timing Requirements
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Protection Functions
        1. 8.3.1.1 OVP
        2. 8.3.1.2 SCP
        3. 8.3.1.3 Temperature Shutdown (TSD)
        4. 8.3.1.4 ACTTIMER
    4. 8.4 Device Functional Modes
      1. 8.4.1 Differential Tilt Mode
      2. 8.4.2 Power-On Reset (POR)
        1. 8.4.2.1 RDY (Power Ready)
        2. 8.4.2.2 Voltage Monitoring
    5. 8.5 Programming
      1. 8.5.1 Serial Port Functional Description
      2. 8.5.2 Write Operation
      3. 8.5.3 Read Operation
      4. 8.5.4 Write and Read Operation
    6. 8.6 Register Maps
      1. 8.6.1 Register State Transition
      2. 8.6.2 DAC Register (12-Bit Write Only)
      3. 8.6.3 Control Register (8-Bit Read/Write)
      4. 8.6.4 Detailed Register Description
        1. 8.6.4.1  REG01 12-Bit DAC for Tilt (offset = 01h)
        2. 8.6.4.2  REG02 12-Bit DAC for Focus (offset = 02h)
        3. 8.6.4.3  REG03 12-Bit DAC for Tracking (offset = 03h)
        4. 8.6.4.4  REG04 12-Bit DAC for Sled1 (offset = 04h)
        5. 8.6.4.5  REG05 12-Bit DAC for Sled2 (offset = 05h)
        6. 8.6.4.6  REG06 12-Bit DAC for Stepping1 (offset = 06h)
        7. 8.6.4.7  REG07 12-Bit DAC for Stepping2 (offset = 07h)
        8. 8.6.4.8  REG08 12-Bit DAC for Spindle (offset = 08h)
        9. 8.6.4.9  REG09 12-Bit DAC for Load (offset = 09h)
        10. 8.6.4.10 REG70 8-Bit Control Register for DriverEna (offset = 70h)
        11. 8.6.4.11 REG71 8-Bit Control Register for FuncEna (offset = 71h)
        12. 8.6.4.12 REG72 8-Bit Control Register for ACTCfg (offset = 72h)
        13. 8.6.4.13 REG73 8-Bit Control Register for Parm0 (offset = 73h)
        14. 8.6.4.14 REG74 8-Bit Control Register for SIFCfg (offset = 74h)
        15. 8.6.4.15 REG75 8-Bit Control Register for Parm1 (offset = 75h)
        16. 8.6.4.16 REG76 8-Bit Control Register for WriteEna (offset = 76h)
        17. 8.6.4.17 REG77 8-Bit Control Register for ClrReg (offset = 77h)
        18. 8.6.4.18 REG78 8-Bit Control Register for ActTemp (offset = 78h)
        19. 8.6.4.19 REG79 8-Bit Control Register for UVLOMon (offset = 79h)
        20. 8.6.4.20 REG7A 8-Bit Control Register for TSDMon (offset = 7Ah)
        21. 8.6.4.21 REG7B 8-Bit Control Register for SCPMon (offset = 7Bh)
        22. 8.6.4.22 REG7C 8-Bit Control Register for TempMon (offset = 7Ch)
        23. 8.6.4.23 REG7D 8-Bit Control Register for Status Monitor (offset = 7Dh)
        24. 8.6.4.24 REG7E 8-Bit Control Register for Version (offset = 7Eh)
        25. 8.6.4.25 REG7F 8-Bit Control Register for Status (offset = 7Fh)
        26. 8.6.4.26 REG60 8-Bit Control Register for SPMCfg (offset = 60h)
        27. 8.6.4.27 REG61 8-Bit Control Register for SPMCfg (offset = 61h)
        28. 8.6.4.28 REG62 8-Bit Control Register for SPMCfg (offset = 62h)
        29. 8.6.4.29 REG64 8-Bit Control Register for Protect (offset = 64h)
        30. 8.6.4.30 REG65 8-Bit Control Register for SPMCfg (offset = 65h)
        31. 8.6.4.31 REG68 8-Bit Control Register for Protect (offset = 68h)
        32. 8.6.4.32 REG6B 8-Bit Control Register for DisProt (offset = 6Bh)
        33. 8.6.4.33 REG6C 8-Bit Control Register for ENDCfg (offset = 6Ch)
        34. 8.6.4.34 REG6E 8-Bit Control Register for UtilCfg (offset = 6Eh)
        35. 8.6.4.35 REG6F 8-Bit Control Register for GPOUTSet (offset = 6Fh)
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1  DAC Type
      2. 9.1.2  Example of 12-Bit DAC Sampling Rate for FCS/TRK/TLT
      3. 9.1.3  Digital Input Coding
      4. 9.1.4  Example Timing of Target Control System
      5. 9.1.5  Spindle Motor Driver Operating Sequence
      6. 9.1.6  Auto Short Brake Function
      7. 9.1.7  Spindle PWM Control
      8. 9.1.8  Spindle Driver Current Limit Circuit
      9. 9.1.9  Sled Driver Part
      10. 9.1.10 Stepping Driver Part
      11. 9.1.11 Focus/Track/Tilt Driver Part
        1. 9.1.11.1 Input VS Output Duty
      12. 9.1.12 Load Driver Part
      13. 9.1.13 End Detect Function
      14. 9.1.14 Load Tray Lock Detect Function
      15. 9.1.15 Load Tray Push Detect Function
      16. 9.1.16 Monitor Signal on GPOUT
      17. 9.1.17 9-V LDO
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Serial Port Digital Interface
    • Serial Peripheral Interface (SPI)
    • 4-Wire Interface: SSZ, SCLK, SIMO, SOMI
    • Maximum Read/Write 35 MHz
    • 3.3-V Digital I/O
  • Actuator and Motor Driver
    • PWM Control With H-Bridge Output
    • Focus / Tracking / Tilt Actuator Driver With 12-Bit DAC Control
    • Sled Motor Drivers With Current Mode, 10-Bit DAC Control
    • Load Driver With 12-Bit DAC Control
    • Stepping Motor Driver With 8-Bit PWM Control
  • Spindle Motor Driver
    • Integrated Current Sense Resistance
    • Changeable Current Limit Value via Register Set
    • Sensor-less: Rotor Position Sense by Motor BEMF
    • 12-Bit Spindle DAC Programmed via Serial Port
    • Self-contained Inductive Position Sense and Startup
    • Quick Stop by Automatic Controlled Brake: Active Brake and Short Brake
    • 1.5-A Maximum Continuous Current Excluding Thermal Issues
    • Low Rdson 0.35-Ω Typical MOSFET Output
  • Utility Functions
    • Status Latch: Act Timer, SIF Error, PWR Monitor, Thermal Protection, and SCP Error
    • On-Chip Thermometer (15°C to 165°C/1.2°C)
  • 9-V LDO
    • Integrated Pre-Driver for 9-V LDO
    • Select the External NFET by Current Requirement
    • Enable by Serial Control
  • Protection
    • Individual Thermal Protect Circuit on SPM, Sled, Step Collimator, and Actuator
    • Two Alert Levels: Pre-Detect and Detect in Thermal Protection
    • ACTTEMP: Monitor the Actuator Temperature Calculated from Integrating the DAC Value Setup Previously
    • Short-Circuit Protection for SPM, Sled, Load, Step, and Act Channel
    • Hardware Device Disable Pin XRSTIN
    • Power Monitor by Undervoltage Lockout (UVLO) and Overvoltage Protection (OVP)
  • Loader Mechanism Support:
    • Independent End-Point Detection Mechanism for Sled and Step Channel
    • Tray Lock Detection
    • Detect Tray Push Event

2 Applications

    Optical Disc Drive (Blu-ray™, DVD, CD)

3 Description

The TPIC2060A is a low-noise motor driver IC suitable for 12-V ODD. The 9-channel driver IC controlled by a serial interface is optimized for driving a spindle motor, a sled motor (stepping motor applicable), a load motor, focus / tracking / tilt actuators, and stepping motor for collimator lens.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPIC2060A HTSSOP (56) 6.10 mm × 14.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

TPIC2060A fbd_FAD_lis166.gif

4 Revision History

DATE REVISION NOTES
July 2015 * Initial release.