SLIS061D July   1998  – September  2015 TPIC6C595

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Serial-In Interface
      2. 8.3.2 Clear Register
      3. 8.3.3 Output Control
      4. 8.3.4 Cascaded Application
      5. 8.3.5 Current Limit Function
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation With V(VIN) < 4.5 V (Minimum V(VIN))
      2. 8.4.2 Operating With 5.5 V < V(VIN) < 6 V
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Step-by-Step Design Procedure
          1. 9.2.2.1.1 R1, R2, R3, R4, R5, R6, R7, R8
          2. 9.2.2.1.2 R9, R10, R11, R12, R13, R14, R15, R16
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|16
  • |
  • N|16
  • D|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

D, PW, or N Package
16-Pin SOIC, TSSOP, or PDIP
Top View
TPIC6C595 po_slis061.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
CLR 7 I Shift register clear, active-low
DRAIN0 3 O Open-drain output
DRAIN1 4 O Open-drain output
DRAIN2 5 O Open-drain output
DRAIN3 6 O Open-drain output
DRAIN4 11 O Open-drain output
DRAIN5 12 O Open-drain output
DRAIN6 13 O Open-drain output
DRAIN7 14 O Open-drain output
G 8 I Output enable, active-low
GND 16 — Power ground
RCK 10 I Register clock
SER IN 2 I Serial data input
SER OUT 9 O Serial data output
SRCK 15 I Shift register clock
VCC 1 I Power supply