SLIS093D March   2000  – March 2015 TPIC6C596

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Serial-In Interface
      2. 8.3.2 Clear Register
      3. 8.3.3 Output Control
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation With V(VIN) < 4.5 V (Minimum V(VIN))
      2. 8.4.2 Operating With 5.5 V < V(VIN) < 6 V
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Cascaded Application
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 R1, R2, R3, R4, R5, R6, R7, R8 R1 = R2 = R3 = R4 = R5 = R6 = R7 = R8 = (Vsupply - V (Dx)) / I (Dx) = (12 V - 2 V) / 0.02 A = 500 Ω
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|16
  • N|16
  • D|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

There is no special layout requirement for the digital signal pin; the only requirement is placing the ceramic bypass capacitors near the corresponding pin. Because the TPIC6C596 device does not have a thermal shutdown protection function, to prevent thermal damage, TJ must be less than 150°C. If the total sink current is high, the power dissipation might be large. The devices are currently not available in the thermal pad package, so good PCB design can optimize heat transfer, which is absolutely essential for the long-term reliability of the device.

Maximize the copper coverage on the PCB to increase the thermal conductivity of the board, because the major heat-flow path from the package to the ambient is through the copper on the PCB. Maximum copper is extremely important when the design does not include heat sinks attached to the PCB on the other side of the package.

  • Add as many thermal vias as possible directly under the package ground pad to optimize the thermal conductivity of the board.
  • All thermal vias should be either plated shut or plugged and capped on both sides of the board to prevent solder voids. To ensure reliability and performance, the solder coverage should be at least 85%.

11.2 Layout Example

TPIC6C596 TPIC6C596_layout_guide.gifFigure 16. Recommended Layout Example

11.3 Thermal Considerations

TPIC6C596 graph_08_slis093.gifFigure 17. D Package, Normalized Junction-to-Ambient Thermal Resistance vs Pulse Duration