SNAS651A
January 2015 – September 2018
TPL5010
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Simplified Application Schematic
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Ratings
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
WAKE
8.3.2
DONE
8.3.3
RSTn
8.4
Device Functional Modes
8.4.1
Start-Up
8.4.2
Normal Operating Mode
8.5
Programming
8.5.1
Configuring the WAKE Interval With the DELAY/M_RST Pin
8.5.2
Manual Reset
8.5.2.1
DELAY/M_RST
8.5.2.2
Circuitry
8.5.3
Timer Interval Selection Using External Resistance
8.5.4
Quantization Error
8.5.5
Error Due to Real External Resistance
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
Community Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DDC|6
MPDS124H
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snas651a_oa
snas651a_pm
7
Specifications