SNAS659B June 2015 – September 2018 TPL5111
PRODUCTION DATA.
The DRVn pin may be connected to the enable input of an LDO or DC-DC converter. The pulse generated at DRVn is equal to the programmed time interval period (tIP), minus 50 ms. It is shorter if a DONE signal is received from the µC before tIP – 50 ms. If the DONE signal is not received within tIP – 50 ms, the DRVn signal will be LOW for the last 50 ms of tIP before the next cycle starts.
The default value (after resistance reading) is HIGH. The signal is sent out from the TPL5111 when the programmed time interval starts. When the DRVn is HIGH, the manual power ON signal is ignored.